Hi Kieran,
Thank you for the patch.
On Wed, Jun 23, 2021 at 12:20:23AM +0100, Kieran Bingham wrote:
From: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
The R-Car DU as found on the D3, E3, and V3U do not have support for an external synchronisation method.
In these cases, the dsysr cached register should not be initialised in DSYSR_TVM_TVSYNC, but instead should be left clear to configure as DSYSR_TVM_MASTER by default.
Signed-off-by: Kieran Bingham kieran.bingham+renesas@ideasonboard.com
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index ea7e39d03545..cff0d82b9491 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -1243,7 +1243,10 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, rcrtc->group = rgrp; rcrtc->mmio_offset = mmio_offsets[hwindex]; rcrtc->index = hwindex;
- rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES) | DSYSR_TVM_TVSYNC;
- rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES);
You can drop the parentheses.
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_TVM_SYNC))
rcrtc->dsysr |= DSYSR_TVM_TVSYNC;if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;