Replace dpu_hw_dspp callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 15 ++++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h | 19 ++++++------------- 3 files changed, 15 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 5a0a6741a431..bf3048e44001 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -462,14 +462,14 @@ static void _dpu_crtc_setup_cp_blocks(struct drm_crtc *crtc) ctl = mixer[i].lm_ctl; dspp = mixer[i].hw_dspp;
- if (!dspp || !dspp->ops.setup_pcc) + if (!dspp) continue;
if (!state->ctm) { - dspp->ops.setup_pcc(dspp, NULL); + dpu_hw_dspp_setup_pcc(dspp, NULL); } else { _dpu_crtc_get_pcc_coeff(state, &cfg); - dspp->ops.setup_pcc(dspp, &cfg); + dpu_hw_dspp_setup_pcc(dspp, &cfg); }
mixer[i].flush_mask |= ctl->ops.get_bitmask_dspp(ctl, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c index 977b25968f34..c17f2bf3324f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c @@ -22,7 +22,7 @@ #define PCC_BLUE_G_OFF 0x24 #define PCC_BLUE_B_OFF 0x30
-static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx, +void dpu_hw_dspp_setup_pcc(struct dpu_hw_dspp *ctx, struct dpu_hw_pcc_cfg *cfg) {
@@ -33,6 +33,11 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx, return; }
+ if (!test_bit(DPU_DSPP_PCC, &ctx->cap->features)) { + DRM_ERROR("called for wrong DSPP block\n"); + return; + } + if (!cfg) { DRM_DEBUG_DRIVER("disable pcc feature\n"); DPU_REG_WRITE(&ctx->hw, base, PCC_DIS); @@ -54,13 +59,6 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx, DPU_REG_WRITE(&ctx->hw, base, PCC_EN); }
-static void _setup_dspp_ops(struct dpu_hw_dspp *c, - unsigned long features) -{ - if (test_bit(DPU_DSPP_PCC, &features)) - c->ops.setup_pcc = dpu_setup_dspp_pcc; -} - static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp, const struct dpu_mdss_cfg *m, void __iomem *addr, @@ -108,7 +106,6 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, /* Assign ops */ c->idx = idx; c->cap = cfg; - _setup_dspp_ops(c, c->cap->features);
dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSPP, idx);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h index 7fa189cfcb06..e712e3e4c67b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h @@ -36,19 +36,15 @@ struct dpu_hw_pcc_cfg { };
/** - * struct dpu_hw_dspp_ops - interface to the dspp hardware driver functions * Caller must call the init function to get the dspp context for each dspp * Assumption is these functions will be called after clocks are enabled */ -struct dpu_hw_dspp_ops { - /** - * setup_pcc - setup dspp pcc - * @ctx: Pointer to dspp context - * @cfg: Pointer to configuration - */ - void (*setup_pcc)(struct dpu_hw_dspp *ctx, struct dpu_hw_pcc_cfg *cfg); - -}; +/** + * setup_pcc - setup dspp pcc + * @ctx: Pointer to dspp context + * @cfg: Pointer to configuration + */ +void dpu_hw_dspp_setup_pcc(struct dpu_hw_dspp *ctx, struct dpu_hw_pcc_cfg *cfg);
/** * struct dpu_hw_dspp - dspp description @@ -65,9 +61,6 @@ struct dpu_hw_dspp { /* dspp */ int idx; const struct dpu_dspp_cfg *cap; - - /* Ops */ - struct dpu_hw_dspp_ops ops; };
/**