Re: [PATCH] drm/stm: ltdc: add clut mode support

On 2017-11-07 16:53, Philippe CORNU wrote:

• Peter

Hi Peter,

CLUT support on STM32 has been removed thanks to your clean up patch

Support is a bit strong for what I thought was a dead function, or are you saying that it used to work before my series? Really sorry if that is the case!

Anyway, the function I removed seemed to indicate that the hardware could handle a separate clut for each layer, but your new version does not. Why is that?

Cheers, peda

named "drm: stm: remove dead code and pointless local lut storage" (https://patchwork.freedesktop.org/patch/166898/)

This below patch puts back the clut mode support using the new drm gamma api.

May I ask you please a short review on this patch?

Many thanks, Philippe :-)

On 10/26/2017 01:17 PM, Philippe Cornu wrote:

...

Add the 8-bit clut mode support at crtc level. Useful for low memory footprint user interfaces but also for 8-bit old games (including color shifting visual effects). Tested with fbdev FBIOPUTCMAP & drm DRM_IOCTL_MODE_SETGAMMA ioctls.

Signed-off-by: Philippe Cornu philippe.cornu@st.com

drivers/gpu/drm/stm/ltdc.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 7be6710..d5c8a42 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -174,6 +174,8 @@

#define LXCFBLNR_CFBLN GENMASK(10, 0) /* Color Frame Buffer Line Number */

+#define CLUT_SIZE 256

• #define CONSTA_MAX 0xFF /* CONSTant Alpha MAX= 1.0 */ #define BF1_PAXCA 0x600 /* Pixel Alpha x Constant Alpha */ #define BF1_CA 0x400 /* Constant Alpha */

@@ -362,6 +364,28 @@ static irqreturn_t ltdc_irq(int irq, void *arg)

• DRM_CRTC

*/

+static void ltdc_crtc_update_clut(struct drm_crtc *crtc) +{

• struct ltdc_device *ldev = crtc_to_ltdc(crtc);
• struct drm_color_lut *lut;
• u32 val;
• int i;
• if (!crtc || !crtc->state)

• return;
  

• if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut)

• return;
  

• lut = (struct drm_color_lut *)crtc->state->gamma_lut->data;
• for (i = 0; i < CLUT_SIZE; i++, lut++) {

• val = ((lut->red << 8) & 0xff0000) | (lut->green & 0xff00) |
  

• 	(lut->blue >> 8) | (i << 24);
  

• reg_write(ldev->regs, LTDC_L1CLUTWR, val);
  

• }

+}

• static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) {

@@ -485,6 +509,8 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc,

DRM_DEBUG_ATOMIC("\n");

• ltdc_crtc_update_clut(crtc);
• /* Commit shadow registers = update planes at next vblank */ reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR);

@@ -532,6 +558,7 @@ void ltdc_crtc_disable_vblank(struct drm_device *ddev, unsigned int pipe) .reset = drm_atomic_helper_crtc_reset, .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,

• .gamma_set = drm_atomic_helper_legacy_gamma_set, };

  /*

@@ -764,6 +791,9 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)

drm_crtc_helper_add(crtc, &ltdc_crtc_helper_funcs);

• drm_mode_crtc_set_gamma_size(crtc, CLUT_SIZE);

• drm_crtc_enable_color_mgmt(crtc, 0, false, CLUT_SIZE);

• DRM_DEBUG_DRIVER("CRTC:%d created\n", crtc->base.id);

  /* Add planes. Note : the first layer is used by primary plane */