Hi, Yongqiang:
Yongqiang Niu yongqiang.niu@mediatek.com 於 2020年12月10日 週四 下午5:22寫道：
rdma fifo size may be different even in same SOC, add this property to the corresponding rdma
Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com
.../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index 1212207..64c64ee 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -66,6 +66,13 @@ Required properties (DMA function blocks): argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details.
+Optional properties (RDMA function blocks): +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
- property to the corresponding rdma
- the value is the Max value which defined in hardware data sheet.
- rdma_fifo_size of rdma0 in mt8183 is 5120
- rdma_fifo_size of rdma1 in mt8183 is 2048
Examples:
mmsys: clock-controller@14000000 { @@ -207,3 +214,12 @@ od@14023000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OD>; };
+rdma1: rdma@1400c000 {
compatible = "mediatek,mt8183-disp-rdma";reg = <0 0x1400c000 0 0x1000>;interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;clocks = <&mmsys CLK_MM_DISP_RDMA1>;mediatek,rdma_fifo_size = <2048>;+};
In [1], Rob has suggest that not add example of rdma1, it's better to add mediatek,rdma_fifo_size in rdma0 for example.
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/1596855231-5782-2-...
Regards, Chun-Kuang.
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