Without this patch a pixel clock rate above 165 MHz on a TMDS link is assumed to be dual link. This is true for DVI, but not for HDMI. HDMI supports no dual link, but it supports pixel clock rates above 165 MHz. Only activate Dual Link mode when it is actual possible.
Signed-off-by: Hauke Mehrtens hauke@hauke-m.de --- drivers/gpu/drm/nouveau/nv50_display.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c | 2 +- drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 981342d..7d11763 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1936,10 +1936,10 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, switch (nv_encoder->dcb->type) { case DCB_OUTPUT_TMDS: if (nv_encoder->dcb->sorconf.link & 1) { - if (mode->clock < 165000) - proto = 0x1; - else - proto = 0x5; + proto = 0x1; + if (mode->clock >= 165000 && + nv_encoder->dcb->duallink_possible) + proto |= 0x4; } else { proto = 0x2; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c index 7f2f05f..ed2b08f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c @@ -895,7 +895,7 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk, u32 *conf) switch (outp->info.type) { case DCB_OUTPUT_TMDS: *conf = (ctrl & 0x00000f00) >> 8; - if (pclk >= 165000) + if (pclk >= 165000 && outp->info.duallink_possible) *conf |= 0x0100; break; case DCB_OUTPUT_LVDS: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c index 8ba808d..594c228 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c @@ -1544,7 +1544,7 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk, u32 *conf) switch (outp->info.type) { case DCB_OUTPUT_TMDS: *conf = (ctrl & 0x00000f00) >> 8; - if (pclk >= 165000) + if (pclk >= 165000 && outp->info.duallink_possible) *conf |= 0x0100; break; case DCB_OUTPUT_LVDS: