From: Mikko Perttunen mperttunen@nvidia.com
Program virtualization tables specifying which VMs have access to which Host1x hardware resources. Programming these has become mandatory in Tegra234.
For now, since the driver does not operate as a Host1x hypervisor, we basically allow access to everything to everyone.
Signed-off-by: Mikko Perttunen mperttunen@nvidia.com --- drivers/gpu/host1x/dev.c | 21 ++++++++++++++++++--- drivers/gpu/host1x/dev.h | 8 ++++++++ 2 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 8c6ce8014c09..5a57165ab0f6 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -217,7 +217,7 @@ static const struct of_device_id host1x_of_match[] = { }; MODULE_DEVICE_TABLE(of, host1x_of_match);
-static void host1x_setup_sid_table(struct host1x *host) +static void host1x_setup_virtualization_tables(struct host1x *host) { const struct host1x_info *info = host->info; unsigned int i; @@ -231,6 +231,21 @@ static void host1x_setup_sid_table(struct host1x *host) host1x_hypervisor_writel(host, entry->offset, entry->base); host1x_hypervisor_writel(host, entry->limit, entry->base + 4); } + + for (i = 0; i < info->streamid_vm_table.count; i++) { + /* Allow access to all stream IDs to all VMs. */ + host1x_hypervisor_writel(host, 0xff, info->streamid_vm_table.base + 4 * i); + } + + for (i = 0; i < info->classid_vm_table.count; i++) { + /* Allow access to all classes to all VMs. */ + host1x_hypervisor_writel(host, 0xff, info->classid_vm_table.base + 4 * i); + } + + for (i = 0; i < info->mmio_vm_table.count; i++) { + /* Use VM1 (that's us) as originator VMID for engine MMIO accesses. */ + host1x_hypervisor_writel(host, 0x1, info->mmio_vm_table.base + 4 * i); + } }
static bool host1x_wants_iommu(struct host1x *host1x) @@ -602,7 +617,7 @@ static int __maybe_unused host1x_runtime_suspend(struct device *dev) return 0;
resume_host1x: - host1x_setup_sid_table(host); + host1x_setup_virtualization_tables(host); host1x_syncpt_restore(host); host1x_intr_start(host);
@@ -632,7 +647,7 @@ static int __maybe_unused host1x_runtime_resume(struct device *dev) goto disable_clk; }
- host1x_setup_sid_table(host); + host1x_setup_virtualization_tables(host); host1x_syncpt_restore(host); host1x_intr_start(host);
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h index 85edcc6e0fc7..920e5548cfbc 100644 --- a/drivers/gpu/host1x/dev.h +++ b/drivers/gpu/host1x/dev.h @@ -90,6 +90,11 @@ struct host1x_sid_entry { unsigned int limit; };
+struct host1x_table_desc { + unsigned int base; + unsigned int count; +}; + struct host1x_info { unsigned int nb_channels; /* host1x: number of channels supported */ unsigned int nb_pts; /* host1x: number of syncpoints supported */ @@ -103,6 +108,9 @@ struct host1x_info { bool has_common; /* has common registers separate from hypervisor */ unsigned int num_sid_entries; const struct host1x_sid_entry *sid_table; + struct host1x_table_desc streamid_vm_table; + struct host1x_table_desc classid_vm_table; + struct host1x_table_desc mmio_vm_table; /* * On T20-T148, the boot chain may setup DC to increment syncpoints * 26/27 on VBLANK. As such we cannot use these syncpoints until