https://bugs.freedesktop.org/show_bug.cgi?id=98761
Bug ID: 98761 Summary: [regression][radeonsi][polaris]"radeonsi: set IF_THRESHOLD to 3" breaks Wither2's ground Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel@lists.freedesktop.org Reporter: arek.rusi@gmail.com QA Contact: dri-devel@lists.freedesktop.org
Created attachment 128044 --> https://bugs.freedesktop.org/attachment.cgi?id=128044&action=edit ground looks weird
mesa/llvm git/trunk kernel 4.8.x & drm-next-4.10-wip
this is happend on polaris(rx470) verde works corectly (for radeon drv, amdgpu not tested yet)
bisected: 74e39de9324d2d2333cda6adca50ae2a3fc36de2 is the first bad commit commit 74e39de9324d2d2333cda6adca50ae2a3fc36de2 Author: Marek Olšák marek.olsak@amd.com Date: Fri Oct 28 23:08:50 2016 +0200
radeonsi: set IF_THRESHOLD to 3
Piglit regressions (radeonsi or LLVM bugs, they pass on softpipe): - glsl-1.10/execution/variable-indexing/vs-output-array-vec3-index-wr - glsl-1.10/execution/variable-indexing/vs-output-array-vec4-index-wr - glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-col-row-wr - glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-row-wr
Totals: SGPRS: 1132185 -> 1168801 (3.23 %) VGPRS: 907856 -> 906204 (-0.18 %) Spilled SGPRs: 2011 -> 2425 (20.59 %) Spilled VGPRs: 368 -> 96 (-73.91 %) Scratch VGPRs: 1344 -> 1060 (-21.13 %) dwords per thread Code Size: 35916164 -> 35705372 (-0.59 %) bytes LDS: 767 -> 767 (0.00 %) blocks Max Waves: 194010 -> 194921 (0.47 %) Wait states: 0 -> 0 (0.00 %)
Before: VGPR SPILLING APPS Shaders SpillVGPR ScratchVGPR alien_isolation 2938 38 40 bioshock-infinite 1769 245 732 dirt-showdown 548 85 72 f1-2015 776 0 320 ue4_lightroom_inter.. 74 0 180
After: VGPR SPILLING APPS Shaders SpillVGPR ScratchVGPR alien_isolation 2938 38 40 bioshock-infinite 1769 0 480 dirt-showdown 548 58 40 f1-2015 776 0 320 ue4_lightroom_inter.. 74 0 180
Bioshock and DiRT benefit.
If I set IF_THRESHOLD=4, tesseract starts spilling VGPRs
Reviewed-by: Nicolai Hähnle nicolai.haehnle@amd.com
:040000 040000 2c773601e2956578e8da4a6031cb02837255b953 7d5f7c3faebe4a11631e70bde258d78fa7357008 M src