Hello Andy,
On Fri, Jun 12, 2020 at 02:57:32PM +0300, Andy Shevchenko wrote:
On Fri, Jun 12, 2020 at 12:12:42AM +0200, Uwe Kleine-König wrote:
I didn't follow the complete discussion but note that the general rule is:
round period down to the next possible implementable period round duty_cycle down to the next possible implementable duty_cycle
so if a small enough period (and so a small duty_cycle) is requested it is expected that duty_cycle will be zero.
...which brings me an idea that PWM framework should expose API to get a capabilities, like DMA Engine has.
In such capabilities, in particular, caller can get ranges of the correct frequencies of the underneath hardware.
my idea is to introduce a function pwm_round_state() that has a similar semantic to clk_round_rate(). But this is only one of several thoughts I have for the pwm framework. And as there is (AFAIK) no user who would benefit from pwm_round_state() this is further down on my todo list.
Best regards Uwe