On Mon, Dec 03, 2018 at 11:32:05AM +0000, Ayan Halder wrote:
Considering the fact that some of the AFBC specific pixel formats are expressed in bits per pixel (ie bpp which is not byte aligned), the pitch (ie width * bpp) is not guaranteed to be aligned to burst size (ie 8 or 16 bytes). For example, DRM_FORMAT_VUY101010 is 30 bits per pixel. For a framebuffer of width 32 pixels, the pitch will be 120 bytes which is not aligned to burst size (ie 16 bytes) for DP650.
Signed-off-by: Ayan Kumar halder ayan.halder@arm.com
Acked-by: Liviu Dudau liviu.dudau@arm.com
drivers/gpu/drm/arm/malidp_planes.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index d0a00ee..eec0442 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -529,8 +529,8 @@ static int malidp_de_plane_check(struct drm_plane *plane, for (i = 0; i < ms->n_planes; i++) { u8 alignment = malidp_hw_get_pitch_align(mp->hwdev, rotated);
if ((fb->pitches[i] * drm_format_info_block_height(fb->format, i))& (alignment - 1)) {
if (((fb->pitches[i] * drm_format_info_block_height(fb->format, i))& (alignment - 1)) && !(fb->modifier)) { DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n", fb->pitches[i], i); return -EINVAL;-- 2.7.4