Re: [PATCH v1 4/5] drm/bridge: tc358768: Disable non-continuous clock mode

On Sun, 3 Oct 2021 at 01:35, Dmitry Osipenko digetx@gmail.com wrote:

Non-continuous clock mode doesn't work because driver doesn't support it properly. The bridge driver programs wrong bitfields that are required by the non-continuous mode (BTACNTRL1 register bitfields are swapped in the code), but fixing them doesn't help.

Display panel of ASUS Transformer TF700T tablet supports non-continuous mode and display doesn't work at all using that mode. There are no device-trees that are actively using this DSI bridge in upstream yet, so clearly the broken mode wasn't ever tested properly. It's a bit too difficult to get LP mode working, hence let's disable the offending mode for now and fall back to continuous mode.

Tested-by: Andreas Westman Dorcsak hedmoo@yahoo.com # Asus TF700T Tested-by: Maxim Schwalm maxim.schwalm@gmail.com #TF700T Signed-off-by: Dmitry Osipenko digetx@gmail.com

---

drivers/gpu/drm/bridge/tc358768.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 5b3f8723bd3d..cfceba5ef3b8 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -631,6 +631,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) { struct tc358768_priv *priv = bridge_to_tc358768(bridge); struct mipi_dsi_device *dsi_dev = priv->output.dev;

•   unsigned long mode_flags = dsi_dev->mode_flags;
    u32 val, val2, lptxcnt, hact, data_type;
    const struct drm_display_mode *mode;
    u32 dsibclk_nsk, dsiclk_nsk, ui_nsk, phy_delay_nsk;
  

@@ -638,6 +639,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) const u32 internal_delay = 40; int ret, i;

•   if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
  

•           dev_warn_once(priv->dev, "Non-continuous mode unimplemented, falling back to continuous\n");
  

•           mode_flags &= ~MIPI_DSI_CLOCK_NON_CONTINUOUS;
  

•   }
  

•   tc358768_hw_enable(priv);
  
    ret = tc358768_sw_reset(priv);
  

@@ -776,7 +782,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) val |= BIT(i + 1); tc358768_write(priv, TC358768_HSTXVREGEN, val);

•   if (!(dsi_dev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
  

•   if (!(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
            tc358768_write(priv, TC358768_TXOPTIONCNTRL, 0x1);
  
    /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */
  

@@ -864,7 +870,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) if (!(dsi_dev->mode_flags & MIPI_DSI_MODE_LPM)) val |= TC358768_DSI_CONTROL_TXMD;

•   if (!(dsi_dev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
  

•   if (!(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
            val |= TC358768_DSI_CONTROL_HSCKMD;
  
    if (dsi_dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)
  

--

Reviewed-by: Robert Foss robert.foss@linaro.org