Hi,
On Tue, Dec 4, 2018 at 3:54 PM Jeykumar Sankaran jsanka@codeaurora.org wrote:
DPU is short for the Display Processing Unit. It is the display controller on Qualcomm SDM845 chips.
This change adds MDSS and DSI nodes to enable display on the target device.
Changes in v2: - Beefed up commit message - Use SoC specific compatibles for mdss and dpu (Rob H) - Use assigned-clocks to set initial clock frequency(Rob H) Changes in v3: - added IOMMU node - Fix device naming (remove _phys) - Use correct IRQ_TYPE in interrupt specifiers Changes in v4: - move mdss node to preserve the unit address sort order - remove _clk suffix from dsi clocks (both the comments are from Doug Anderson) Changes in v5: - Keep the device status "disabled" by default (Bjorn Andersson) - Use MDSS_GDSC macro (Jordan) - Fix phy-names (Jordan) - List reg ranges in numerical order (Jordan) Changes in v6: - Separating this patch out of the series - fix phy-names
Signed-off-by: Jeykumar Sankaran jsanka@codeaurora.org Signed-off-by: Sean Paul seanpaul@chromium.org
arch/arm64/boot/dts/qcom/sdm845.dtsi | 203 +++++++++++++++++++++++++++++++++++ 1 file changed, 203 insertions(+)
With my admittedly limited understanding of the device tree for graphics, this looks good to me.
Reviewed-by: Douglas Anderson dianders@chromium.org
...this works for me on sdm845-cheza. Specifically I tested it on our 4.19 branch which has some display backports and a few picks from the mailing list. Anyone specifically interested in the tree I tested with can see https://crrev.com/c/1327901, which includes this patch. Thus:
Tested-by: Douglas Anderson dianders@chromium.org