27 May
2020
27 May
'20
4:54 p.m.
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard maxime@cerno.tech wrote:
The VIDEN bit in the pixelvalve currently being used to enable or disable the pixelvalve seems to not be enough in some situations, which whill end up with the pixelvalve stalling.
In such a case, even re-enabling VIDEN doesn't bring it back and we need to clear the FIFO. This can only be done if the pixelvalve is disabled though.
In order to overcome this, we can configure the pixelvalve during mode_set_no_fb, but only enable it in atomic_enable and flush the FIFO there, and in atomic_disable disable the pixelvalve again.
What displays has this been tested with? Getting this sequencing right is so painful, and things like DSI are tricky to get to light up.