Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function panel_simple_prepare(struct drm_panel *panel) is not being called. - The image is displaced even when using the same timing values in the datasheet.
I would like to know if I'm doing something wrong on my dtsi, or if something is missing on the panel-simple.c. I would appreciate any help.
Thanks!
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index da81552..13fcce9 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -24,7 +24,7 @@ reg = <0x80000000 0x40000000>; };
- backlight { + backlight_display: backlight-display { compatible = "pwm-backlight"; pwms = <&pwm3 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; @@ -104,6 +104,7 @@ regulator-name = "lcd-3v3"; gpio = <&gpio3 27 0>; enable-active-high; + regulator-always-on; };
reg_peri_3v3: regulator@5 { @@ -146,6 +147,19 @@ mux-int-port = <2>; mux-ext-port = <6>; }; + + panel { + compatible = "seiko,43wvf1g", "simple-panel"; + backlight = <&backlight_display>; + + power-supply = <®_lcd_3v3>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; };
&audmux { @@ -215,33 +229,14 @@ &lcdif1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd>; - lcd-supply = <®_lcd_3v3>; - display = <&display0>; status = "okay";
- display0: display0 { - bits-per-pixel = <16>; - bus-width = <24>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <33500000>; - hactive = <800>; - vactive = <480>; - hback-porch = <89>; - hfront-porch = <164>; - vback-porch = <23>; - vfront-porch = <10>; - hsync-len = <10>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; + port{ + display_out: endpoint { + remote-endpoint = <&panel_in>; }; }; + };
&pwm3 { diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 06aaf79..8faefee 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -863,6 +863,31 @@ static const struct panel_desc hannstar_hsd070pww1 = { .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, };
+static const struct display_timing seiko_43wvf1g_timing = { + .pixelclock = { 33500000, 33500000, 33500000 }, + .hactive = { 800, 800, 800 }, + .hfront_porch = { 164, 164, 164 }, + .hback_porch = { 89, 89, 89 }, + .hsync_len = { 10, 10, 10 }, + .vactive = { 480, 480, 480 }, + .vfront_porch = { 10, 10, 10 }, + .vback_porch = { 23, 23, 23 }, + .vsync_len = { 10, 10, 10 }, + .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE | + DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW, +}; + +static const struct panel_desc seiko_43wvf1g = { + .timings = &seiko_43wvf1g_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 93, + .height = 57, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, +}; + static const struct display_timing hannstar_hsd100pxn1_timing = { .pixelclock = { 55000000, 65000000, 75000000 }, .hactive = { 1024, 1024, 1024 }, @@ -1853,6 +1878,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "samsung,ltn140at29-301", .data = &samsung_ltn140at29_301, }, { + .compatible = "seiko,43wvf1g", + .data = &seiko_43wvf1g, + }, { .compatible = "sharp,lq101k1ly04", .data = &sharp_lq101k1ly04, }, { -- 2.7.4
-- Breno Matheus Lima