RZ/G2L LCDC does not have DU plane registers. This patch supports DU planes only for the SoC's with plane feature bit is set.
Signed-off-by: Biju Das biju.das.jz@bp.renesas.com --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 3 +++ drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 3 ++- 2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index f361a604337f..521446890d3d 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -349,6 +349,9 @@ static void rcar_du_crtc_update_planes(struct rcar_du_crtc *rcrtc) unsigned int i; u32 dspr = 0;
+ if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_PLANE)) + return; + for (i = 0; i < rcrtc->group->num_planes; ++i) { struct rcar_du_plane *plane = &rcrtc->group->planes[i]; unsigned int j; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index cf045a203aa5..364d0e911735 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -82,7 +82,8 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) else state.hwindex = crtc->index % 2;
- __rcar_du_plane_setup(crtc->group, &state); + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_PLANE)) + __rcar_du_plane_setup(crtc->group, &state);
/* * Ensure that the plane source configuration takes effect by requesting