On Mon, Jun 21, 2021 at 2:25 AM Jagan Teki jagan@amarulasolutions.com wrote:
Add eLCDIF controller node for i.MX8MM.
Cc: Rob Herring robh+dt@kernel.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index fe5485ee9419..5f68182ed3a6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1030,6 +1030,25 @@ aips4: bus@32c00000 { #size-cells = <1>; ranges = <0x32c00000 0x32c00000 0x400000>;
lcdif: lcdif@32e00000 {compatible = "fsl,imx8mm-lcdif", "fsl,imx6sx-lcdif";
Based on a comment I read from Marek [1] from this patch series for the driver, I think fallback compatible should be fsl,imx28-lcdif.
"The iMX8MM and iMX8MN do not support the overlay plane, so they are MXSFB V4"
[1] - https://patchwork.kernel.org/project/dri-devel/patch/20210620224834.189411-1...
adam
reg = <0x32e00000 0x10000>;clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,<&clk IMX8MM_CLK_DISP_AXI_ROOT>,<&clk IMX8MM_CLK_DISP_APB_ROOT>;clock-names = "pix", "disp_axi", "axi";assigned-clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,<&clk IMX8MM_CLK_DISP_AXI>,<&clk IMX8MM_CLK_DISP_APB>;assigned-clock-parents = <&clk IMX8MM_VIDEO_PLL1_OUT>,<&clk IMX8MM_SYS_PLL2_1000M>,<&clk IMX8MM_SYS_PLL1_800M>;assigned-clock-rate = <594000000>, <500000000>, <200000000>;interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF>;status = "disabled";};dispmix_blk_ctl: blk-ctl@32e28000 { compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon"; reg = <0x32e28000 0x100>;-- 2.25.1