On Mon, 2022-05-09 at 15:31 +0800, Krzysztof Kozlowski wrote:
On 09/05/2022 06:43, Rex-BC Chen wrote:
From: "Nancy.Lin" nancy.lin@mediatek.com
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin nancy.lin@mediatek.com Reviewed-by: AngeloGioacchino Del Regno < angelogioacchino.delregno@collabora.com>
.../display/mediatek/mediatek,mdp-rdma.yaml | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- rdma.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- rdma.yaml new file mode 100644 index 000000000000..ca31accb0a95 --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- rdma.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/m...
+$schema: https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;...
+title: MediaTek MDP RDMA
+maintainers:
- Chun-Kuang Hu chunkuang.hu@kernel.org
- Philipp Zabel p.zabel@pengutronix.de
+description:
- The MediaTek MDP RDMA stands for Read Direct Memory Access.
- It provides real time data to the back-end panel driver, such as
DSI,
- DPI and DP_INTF.
- It contains one line buffer to store the sufficient pixel data.
- RDMA device node must be siblings to the central MMSYS_CONFIG
node.
- For a description of the MMSYS_CONFIG binding, see
- Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya
ml for details.
+properties:
- compatible:
- oneOf:
oneOf is not needed
- items:items not needed, you have only one item.
Hello Krzysztof,
Thanks for your review. ok, we will drop them.
- const: mediatek,mt8195-vdo1-rdma- reg:
- maxItems: 1
- interrupts:
- maxItems: 1
- power-domains:
- description: A phandle and PM domain specifier as defined by
bindings of
the power controller specified by phandle. SeeDocumentation/devicetree/bindings/power/power-domain.yamlfor details.
Skip description, it's obvious. Instead maxItems.
ok, we will fix it.
- clocks:
- items:
- description: RDMA Clock- iommus:
- description:
This property should point to the respective IOMMU blockwith master port as argument,
seeDocumentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
Skip description, it's obvious. Instead maxItems.
ok, we will fix it.
- mediatek,gce-client-reg:
- description:
The register of display function block to be set by gce.There are 4 arguments,
such as gce node, subsys id, offset and register size. Thesubsys id that is
mapping to the register of display function blocks isdefined in the gce header
include/include/dt-bindings/gce/<chip>-gce.h of each chips.Double "include" in the path.
ok, we will fix it.
- $ref: /schemas/types.yaml#/definitions/phandle-array
- items:
items:- description: phandle of GCE- description: GCE subsys id- description: register offset- description: register size- maxItems: 1
+required:
- compatible
- reg
- power-domains
- clocks
- iommus
- mediatek,gce-client-reg
+additionalProperties: false
+examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/mt8195-clk.h>
- #include <dt-bindings/power/mt8195-power.h>
- #include <dt-bindings/gce/mt8195-gce.h>
- #include <dt-bindings/memory/mt8195-memory-port.h>
- soc {
#address-cells = <2>;#size-cells = <2>;vdo1_rdma0: mdp-rdma@1c104000 {Generic node name. dma-controller (if it does not conflict with dma-common.yaml schema)?
We don't understand what dma-controller you are referring to? Can you help explain more? Thanks!
BRs, Rex
compatible = "mediatek,mt8195-vdo1-rdma";reg = <0 0x1c104000 0 0x1000>;interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX0x4000 0x1000>;
};- };
Best regards, Krzysztof