On Mon, 2018-09-10 at 14:43 +0300, Jani Nikula wrote:
On Mon, 10 Sep 2018, "Lee, Shawn C" shawn.c.lee@intel.com wrote:
The N value was computed by kernel driver that based on synchronous clock mode. But only specific N value (0x8000) would be acceptable for LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode. With the other N value, Tcon will enter BITS mode and display black screen. Add this panel into quirk database and give particular N value when calculate M/N divider.
Cc: Jani Nikula jani.nikula@intel.com Cc: Cooper Chiou cooper.chiou@intel.com Cc: Matt Atwood matthew.s.atwood@intel.com Cc: Maarten Lankhorst maarten.lankhorst@linux.intel.com Cc: Dhinakaran Pandiyan dhinakaran.pandiyan@intel.com Cc: Clint Taylor clinton.a.taylor@intel.com Signed-off-by: Lee, Shawn C shawn.c.lee@intel.com
No access to the panel or its details, so instead of review,
Acked-by: Jani Nikula jani.nikula@intel.com
drivers/gpu/drm/drm_dp_helper.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index d0c1250975ab..0ef7c43a9025 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -1270,6 +1270,8 @@ struct dpcd_quirk { static const struct dpcd_quirk dpcd_quirk_list[] = { /* Analogix 7737 needs reduced M and N at HBR2 link rates */ { OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true,
Wonder if DEVICE_ID_ANY still the accurate criteria for these dongles now that we can check against device IDs. I guess, since the quirk fixes multiple dongles we probably can't check against a single device ID.
BIT(DP_DPCD_QUIRK_CONSTANT_N) },
- /* LG LP140WF6-SPM1 eDP panel */
If you are resending the patches, it might be worth updating the comment to /* LG LP140WF6-SPM1 eDP panel needs N value of 0x8000 */
- { OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a',
'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) }, };
#undef OUI