Add a new entry for the Toshiba LTA089AC29000 panel.
Signed-off-by: Boris Brezillon boris.brezillon@collabora.com --- .../display/panel/toshiba,lt089ac29000.txt | 5 ++- drivers/gpu/drm/panel/panel-simple.c | 36 +++++++++++++++++++ 2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/panel/toshiba,lt089ac29000.txt b/Documentation/devicetree/bindings/display/panel/toshiba,lt089ac29000.txt index 89826116628c..26ebfa098966 100644 --- a/Documentation/devicetree/bindings/display/panel/toshiba,lt089ac29000.txt +++ b/Documentation/devicetree/bindings/display/panel/toshiba,lt089ac29000.txt @@ -1,7 +1,10 @@ Toshiba 8.9" WXGA (1280x768) TFT LCD panel
Required properties: -- compatible: should be "toshiba,lt089ac29000" +- compatible: should be one of the following + "toshiba,lt089ac29000" + "toshiba,lta089ac29000" + - power-supply: as specified in the base binding
This binding is compatible with the simple-panel binding, which is specified diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index bff7578f84dd..4c1deed44ce2 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2857,6 +2857,39 @@ static const struct panel_desc toshiba_lt089ac29000 = { .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, };
+static const struct drm_display_mode toshiba_lta089ac29000_mode = { + .clock = 79500, + .hdisplay = 1280, + .hsync_start = 1280 + 192, + .hsync_end = 1280 + 192 + 128, + .htotal = 1280 + 192 + 128 + 64, + .vdisplay = 768, + .vsync_start = 768 + 20, + .vsync_end = 768 + 20 + 7, + .vtotal = 768 + 20 + 7 + 3, + .vrefresh = 60, +}; + +static const struct panel_desc toshiba_lta089ac29000 = { + .modes = &toshiba_lta089ac29000_mode, + .num_modes = 1, + .size = { + .width = 194, + .height = 116, + }, + /* + * FIXME: + * The panel supports 2 bus formats: jeida-24 and jeida-18. The + * mode is selected through the 8b6b_SEL pin. If anyone ever needs + * support for jeida-18 we should probably parse the 'data-mapping' + * property. + * In the unlikely event where 8b6b_SEL is connected to a GPIO, we'd + * need a new infra to allow bus format negotiation at the panel level. + */ + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, +}; + static const struct drm_display_mode tpk_f07a_0102_mode = { .clock = 33260, .hdisplay = 800, @@ -3305,6 +3338,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "toshiba,lt089ac29000", .data = &toshiba_lt089ac29000, + }, { + .compatible = "toshiba,lta089ac29000", + .data = &toshiba_lta089ac29000, }, { .compatible = "tpk,f07a-0102", .data = &tpk_f07a_0102,