We could also update the adjusted mode clock to the actual clock set by the pll
so that drm_calc_timestamping_constants() uses the actual clock value on the
PLL.  E.g.,

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index daa4dd3..2a2da82 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1085,6 +1085,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
                atombios_crtc_program_ss(rdev, ATOM_ENABLE,
radeon_crtc->pll_id,
                                         radeon_crtc->crtc_id,
&radeon_crtc->ss);
        }
+       mode->clock = pll_clock * 10;
 }

 static int dce4_crtc_do_set_base(struct drm_crtc *crtc,