AGP is deprecated for 10+ years now and not used any more on modern hardware.
Old hardware should continue to work in PCI mode.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/nouveau/nouveau_abi16.c | 16 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 46 +---- drivers/gpu/drm/nouveau/nouveau_chan.c | 32 +--- drivers/gpu/drm/nouveau/nouveau_drv.h | 7 - drivers/gpu/drm/nouveau/nouveau_ttm.c | 14 +- drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c | 175 ------------------ drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 19 -- .../gpu/drm/nouveau/nvkm/subdev/pci/base.c | 22 +-- 8 files changed, 17 insertions(+), 314 deletions(-) delete mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c delete mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index e2bae1424502..b6754bfb2f48 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -515,7 +515,6 @@ int nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) { struct drm_nouveau_notifierobj_alloc *info = data; - struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv); struct nouveau_abi16_chan *chan; struct nouveau_abi16_ntfy *ntfy; @@ -555,17 +554,10 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) args.start += chan->ntfy_vma->addr; args.limit += chan->ntfy_vma->addr; } else - if (drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += drm->agp.base + chan->ntfy->bo.offset; - args.limit += drm->agp.base + chan->ntfy->bo.offset; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += chan->ntfy->bo.offset; - args.limit += chan->ntfy->bo.offset; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start += chan->ntfy->bo.offset; + args.limit += chan->ntfy->bo.offset;
client->route = NVDRM_OBJECT_ABI16; client->super = true; diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index c40f127de3d0..4e12bcd6e629 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -635,14 +635,6 @@ nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) static struct ttm_tt * nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { -#if IS_ENABLED(CONFIG_AGP) - struct nouveau_drm *drm = nouveau_bdev(bo->bdev); - - if (drm->agp.bridge) { - return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags); - } -#endif - return nouveau_sgdma_create_ttm(bo, page_flags); }
@@ -685,23 +677,11 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) man->func = &nouveau_gart_manager; else - if (!drm->agp.bridge) man->func = &nv04_gart_manager; - else - man->func = &ttm_bo_manager_func; - - if (drm->agp.bridge) { - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; - man->available_caching = TTM_PL_FLAG_UNCACHED | - TTM_PL_FLAG_WC; - man->default_caching = TTM_PL_FLAG_WC; - } else { - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | - TTM_MEMTYPE_FLAG_CMA; - man->available_caching = TTM_PL_MASK_CACHING; - man->default_caching = TTM_PL_FLAG_CACHED; - }
+ man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; + man->available_caching = TTM_PL_MASK_CACHING; + man->default_caching = TTM_PL_FLAG_CACHED; break; default: return -EINVAL; @@ -1448,13 +1428,6 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) /* System memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - reg->bus.offset = reg->start << PAGE_SHIFT; - reg->bus.base = drm->agp.base; - reg->bus.is_iomem = !drm->agp.cma; - } -#endif if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 || !mem->kind) /* untiled */ break; @@ -1603,12 +1576,6 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - return ttm_agp_tt_populate(ttm, ctx); - } -#endif - #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86) if (swiotlb_nr_tbl()) { return ttm_dma_populate((void *)ttm, dev, ctx); @@ -1656,13 +1623,6 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) - if (drm->agp.bridge) { - ttm_agp_tt_unpopulate(ttm); - return; - } -#endif - #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86) if (swiotlb_nr_tbl()) { ttm_dma_unpopulate((void *)ttm, dev); diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index d9381a053169..521c495a301a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -200,18 +200,10 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.limit = device->info.ram_user - 1; } } else { - if (chan->drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = chan->drm->agp.base; - args.limit = chan->drm->agp.base + - chan->drm->agp.size - 1; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = 0; - args.limit = chan->vmm->vmm.limit - 1; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start = 0; + args.limit = chan->vmm->vmm.limit - 1; }
ret = nvif_object_init(&device->object, 0, NV_DMA_FROM_MEMORY, @@ -401,18 +393,10 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.start = 0; args.limit = chan->vmm->vmm.limit - 1; } else - if (chan->drm->agp.bridge) { - args.target = NV_DMA_V0_TARGET_AGP; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = chan->drm->agp.base; - args.limit = chan->drm->agp.base + - chan->drm->agp.size - 1; - } else { - args.target = NV_DMA_V0_TARGET_VM; - args.access = NV_DMA_V0_ACCESS_RDWR; - args.start = 0; - args.limit = chan->vmm->vmm.limit - 1; - } + args.target = NV_DMA_V0_TARGET_VM; + args.access = NV_DMA_V0_ACCESS_RDWR; + args.start = 0; + args.limit = chan->vmm->vmm.limit - 1;
ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY, &args, sizeof(args), &chan->gart); diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 2a6519737800..508b94a86ae4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -142,13 +142,6 @@ struct nouveau_drm {
u8 old_pm_cap;
- struct { - struct agp_bridge_data *bridge; - u32 base; - u32 size; - bool cma; - } agp; - /* TTM interface support */ struct { struct ttm_bo_device bdev; diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c index 7ca0a2498532..061510070350 100644 --- a/drivers/gpu/drm/nouveau/nouveau_ttm.c +++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c @@ -192,7 +192,6 @@ int nouveau_ttm_init(struct nouveau_drm *drm) { struct nvkm_device *device = nvxx_device(&drm->client.device); - struct nvkm_pci *pci = device->pci; struct nvif_mmu *mmu = &drm->client.mmu; struct drm_device *dev = drm->dev; int typei, ret; @@ -222,13 +221,6 @@ nouveau_ttm_init(struct nouveau_drm *drm) drm->ttm.type_vram = -1; }
- if (pci && pci->agp.bridge) { - drm->agp.bridge = pci->agp.bridge; - drm->agp.base = pci->agp.base; - drm->agp.size = pci->agp.size; - drm->agp.cma = pci->agp.cma; - } - ret = ttm_bo_device_init(&drm->ttm.bdev, &nouveau_bo_driver, dev->anon_inode->i_mapping, @@ -256,11 +248,7 @@ nouveau_ttm_init(struct nouveau_drm *drm) device->func->resource_size(device, 1));
/* GART init */ - if (!drm->agp.bridge) { - drm->gem.gart_available = drm->client.vmm.vmm.limit; - } else { - drm->gem.gart_available = drm->agp.size; - } + drm->gem.gart_available = drm->client.vmm.vmm.limit;
ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT, drm->gem.gart_available >> PAGE_SHIFT); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c deleted file mode 100644 index 385a90f91ed6..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Copyright 2015 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "agp.h" -#ifdef __NVKM_PCI_AGP_H__ -#include <core/option.h> - -struct nvkm_device_agp_quirk { - u16 hostbridge_vendor; - u16 hostbridge_device; - u16 chip_vendor; - u16 chip_device; - int mode; -}; - -static const struct nvkm_device_agp_quirk -nvkm_device_agp_quirks[] = { - /* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */ - { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 }, - /* SiS 761 does not support AGP cards, use PCI mode */ - { PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 }, - {}, -}; - -void -nvkm_agp_fini(struct nvkm_pci *pci) -{ - if (pci->agp.acquired) { - agp_backend_release(pci->agp.bridge); - pci->agp.acquired = false; - } -} - -/* Ensure AGP controller is in a consistent state in case we need to - * execute the VBIOS DEVINIT scripts. - */ -void -nvkm_agp_preinit(struct nvkm_pci *pci) -{ - struct nvkm_device *device = pci->subdev.device; - u32 mode = nvkm_pci_rd32(pci, 0x004c); - u32 save[2]; - - /* First of all, disable fast writes, otherwise if it's already - * enabled in the AGP bridge and we disable the card's AGP - * controller we might be locking ourselves out of it. - */ - if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) { - mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW; - agp_enable(pci->agp.bridge, mode); - } - - /* clear busmaster bit, and disable AGP */ - save[0] = nvkm_pci_rd32(pci, 0x0004); - nvkm_pci_wr32(pci, 0x0004, save[0] & ~0x00000004); - nvkm_pci_wr32(pci, 0x004c, 0x00000000); - - /* reset PGRAPH, PFIFO and PTIMER */ - save[1] = nvkm_mask(device, 0x000200, 0x00011100, 0x00000000); - nvkm_mask(device, 0x000200, 0x00011100, save[1]); - - /* and restore busmaster bit (gives effect of resetting AGP) */ - nvkm_pci_wr32(pci, 0x0004, save[0]); -} - -int -nvkm_agp_init(struct nvkm_pci *pci) -{ - if (!agp_backend_acquire(pci->pdev)) { - nvkm_error(&pci->subdev, "failed to acquire agp\n"); - return -ENODEV; - } - - agp_enable(pci->agp.bridge, pci->agp.mode); - pci->agp.acquired = true; - return 0; -} - -void -nvkm_agp_dtor(struct nvkm_pci *pci) -{ - arch_phys_wc_del(pci->agp.mtrr); -} - -void -nvkm_agp_ctor(struct nvkm_pci *pci) -{ - const struct nvkm_device_agp_quirk *quirk = nvkm_device_agp_quirks; - struct nvkm_subdev *subdev = &pci->subdev; - struct nvkm_device *device = subdev->device; - struct agp_kern_info info; - int mode = -1; - -#ifdef __powerpc__ - /* Disable AGP by default on all PowerPC machines for now -- At - * least some UniNorth-2 AGP bridges are known to be broken: - * DMA from the host to the card works just fine, but writeback - * from the card to the host goes straight to memory - * untranslated bypassing that GATT somehow, making them quite - * painful to deal with... - */ - mode = 0; -#endif - mode = nvkm_longopt(device->cfgopt, "NvAGP", mode); - - /* acquire bridge temporarily, so that we can copy its info */ - if (!(pci->agp.bridge = agp_backend_acquire(pci->pdev))) { - nvkm_warn(subdev, "failed to acquire agp\n"); - return; - } - agp_copy_info(pci->agp.bridge, &info); - agp_backend_release(pci->agp.bridge); - - pci->agp.mode = info.mode; - pci->agp.base = info.aper_base; - pci->agp.size = info.aper_size * 1024 * 1024; - pci->agp.cma = info.cant_use_aperture; - pci->agp.mtrr = -1; - - /* determine if bridge + chipset combination needs a workaround */ - while (quirk->hostbridge_vendor) { - if (info.device->vendor == quirk->hostbridge_vendor && - info.device->device == quirk->hostbridge_device && - (quirk->chip_vendor == (u16)PCI_ANY_ID || - pci->pdev->vendor == quirk->chip_vendor) && - (quirk->chip_device == (u16)PCI_ANY_ID || - pci->pdev->device == quirk->chip_device)) { - nvkm_info(subdev, "forcing default agp mode to %dX, " - "use NvAGP=<mode> to override\n", - quirk->mode); - mode = quirk->mode; - break; - } - quirk++; - } - - /* apply quirk / user-specified mode */ - if (mode >= 1) { - if (pci->agp.mode & 0x00000008) - mode /= 4; /* AGPv3 */ - pci->agp.mode &= ~0x00000007; - pci->agp.mode |= (mode & 0x7); - } else - if (mode == 0) { - pci->agp.bridge = NULL; - return; - } - - /* fast writes appear to be broken on nv18, they make the card - * lock up randomly. - */ - if (device->chipset == 0x18) - pci->agp.mode &= ~PCI_AGP_COMMAND_FW; - - pci->agp.mtrr = arch_phys_wc_add(pci->agp.base, pci->agp.size); -} -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h deleted file mode 100644 index ad4d3621d02b..000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#include "priv.h" -#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)) -#ifndef __NVKM_PCI_AGP_H__ -#define __NVKM_PCI_AGP_H__ - -void nvkm_agp_ctor(struct nvkm_pci *); -void nvkm_agp_dtor(struct nvkm_pci *); -void nvkm_agp_preinit(struct nvkm_pci *); -int nvkm_agp_init(struct nvkm_pci *); -void nvkm_agp_fini(struct nvkm_pci *); -#endif -#else -static inline void nvkm_agp_ctor(struct nvkm_pci *pci) {} -static inline void nvkm_agp_dtor(struct nvkm_pci *pci) {} -static inline void nvkm_agp_preinit(struct nvkm_pci *pci) {} -static inline int nvkm_agp_init(struct nvkm_pci *pci) { return -ENOSYS; } -static inline void nvkm_agp_fini(struct nvkm_pci *pci) {} -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c index ee2431a7804e..4f84fc1f2499 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c @@ -22,7 +22,6 @@ * Authors: Ben Skeggs bskeggs@redhat.com */ #include "priv.h" -#include "agp.h"
#include <core/option.h> #include <core/pci.h> @@ -86,20 +85,12 @@ nvkm_pci_intr(int irq, void *arg) static int nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend) { - struct nvkm_pci *pci = nvkm_pci(subdev); - - if (pci->agp.bridge) - nvkm_agp_fini(pci); - return 0; }
static int nvkm_pci_preinit(struct nvkm_subdev *subdev) { - struct nvkm_pci *pci = nvkm_pci(subdev); - if (pci->agp.bridge) - nvkm_agp_preinit(pci); return 0; }
@@ -128,15 +119,9 @@ static int nvkm_pci_init(struct nvkm_subdev *subdev) { struct nvkm_pci *pci = nvkm_pci(subdev); - int ret;
- if (pci->agp.bridge) { - ret = nvkm_agp_init(pci); - if (ret) - return ret; - } else if (pci_is_pcie(pci->pdev)) { + if (pci_is_pcie(pci->pdev)) nvkm_pcie_init(pci); - }
if (pci->func->init) pci->func->init(pci); @@ -155,8 +140,6 @@ nvkm_pci_dtor(struct nvkm_subdev *subdev) { struct nvkm_pci *pci = nvkm_pci(subdev);
- nvkm_agp_dtor(pci); - if (pci->irq >= 0) { /* freq_irq() will call the handler, we use pci->irq == -1 * to signal that it's been torn down and should be a noop. @@ -196,9 +179,6 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device, pci->pcie.speed = -1; pci->pcie.width = -1;
- if (device->type == NVKM_DEVICE_AGP) - nvkm_agp_ctor(pci); - switch (pci->pdev->device & 0x0ff0) { case 0x00f0: case 0x02e0: