Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:55 EEST Ulrich Hecht wrote:
From: Koji Matsuoka koji.matsuoka.xm@renesas.com
Signed-off-by: Koji Matsuoka koji.matsuoka.xm@renesas.com
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index b52b3e8..cd6803a 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -229,6 +229,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) unsigned long rate; u32 extdiv;
clk_set_rate(rcrtc->extclock, mode_clock);
This is a hack, Jacopo has posted "[PATCH 3/3] drm: rcar-du: Improve non-DPLL clock selection" which I think is a better solution (or will be in v2 :-)).
extclk = clk_get_rate(rcrtc->extclock); if (rcdu->info->dpll_ch & (1 << rcrtc->index)) { unsigned long target = mode_clock;