Designware HDMI supports four interfaces to config hdmi audio (I2S, S/PDIF, Generic Parallel Audio, AHB Audio DMA), but rk3288 only support two ways to config hdmi audio(I2S, S/PDIF), So we take I2S as hdmi audio operation interfaces.
Signed-off-by: Yakir Yang ykk@rock-chips.com --- Changes in v2: - Add audio config interfaces to dw_hdmi driver
drivers/gpu/drm/bridge/dw_hdmi.c | 70 +++++++++++++++++++++++++++++++++------- drivers/gpu/drm/bridge/dw_hdmi.h | 6 ++++ include/drm/bridge/dw_hdmi.h | 30 +++++++++++++++++ 3 files changed, 95 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c index 8cc7b3d..25c1678 100644 --- a/drivers/gpu/drm/bridge/dw_hdmi.c +++ b/drivers/gpu/drm/bridge/dw_hdmi.c @@ -16,6 +16,7 @@ #include <linux/err.h> #include <linux/clk.h> #include <linux/hdmi.h> +#include <linux/mutex.h> #include <linux/of_device.h>
#include <drm/drm_of.h> @@ -126,7 +127,10 @@ struct dw_hdmi { struct i2c_adapter *ddc; void __iomem *regs;
- unsigned int sample_rate; + struct hdmi_audio_fmt aud_fmt; + struct mutex audio_mutex; + bool audio_enable; + int ratio;
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); @@ -208,7 +212,7 @@ static void hdmi_set_schnl(struct dw_hdmi *hdmi) { u8 aud_schnl_samplerate;
- switch (hdmi->sample_rate) { + switch (hdmi->aud_fmt.sample_rate) { case 32000: aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K; break; @@ -444,9 +448,9 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, { unsigned int clk_n, clk_cts;
- clk_n = hdmi_compute_n(hdmi->sample_rate, pixel_clk, + clk_n = hdmi_compute_n(hdmi->aud_fmt.sample_rate, pixel_clk, hdmi->ratio); - clk_cts = hdmi_compute_cts(hdmi->sample_rate, pixel_clk, + clk_cts = hdmi_compute_cts(hdmi->aud_fmt.sample_rate, pixel_clk, hdmi->ratio);
if (!clk_cts) { @@ -456,7 +460,7 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, }
dev_dbg(hdmi->dev, "%s: samplerate=%d ratio=%d pixelclk=%lu N=%d cts=%d\n", - __func__, hdmi->sample_rate, hdmi->ratio, + __func__, hdmi->aud_fmt.sample_rate, hdmi->ratio, pixel_clk, clk_n, clk_cts);
hdmi_regenerate_n_cts(hdmi, clk_n, clk_cts); @@ -1023,6 +1027,25 @@ static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1); }
+static void hdmi_config_audio(struct dw_hdmi *hdmi, + struct hdmi_audio_fmt *aud_fmt) +{ + if (aud_fmt) + hdmi->aud_fmt = *aud_fmt; + + hdmi_modb(hdmi, AUDIO_CONF0_INTERFACE_II2S, + AUDIO_CONF0_INTERFACE_MSK, HDMI_AUD_CONF0); + + hdmi_modb(hdmi, hdmi->aud_fmt.chan_num, AUDIO_CONF0_I2SINEN_MSK, + HDMI_AUD_CONF0); + + hdmi_modb(hdmi, hdmi->aud_fmt.word_length, AUDIO_CONF1_DATWIDTH_MSK, + HDMI_AUD_CONF1); + + hdmi_modb(hdmi, hdmi->aud_fmt.dai_fmt, AUDIO_CONF1_DATAMODE_MSK, + HDMI_AUD_CONF1); +} + static void hdmi_config_AVI(struct dw_hdmi *hdmi) { u8 val, pix_fmt, under_scan; @@ -1212,6 +1235,34 @@ static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi) hdmi->phy_enabled = false; }
+void hdmi_audio_clk_enable(struct dw_hdmi *hdmi) +{ + if (hdmi->audio_enable) + return; + + mutex_lock(&hdmi->audio_mutex); + hdmi->audio_enable = true; + hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); + mutex_unlock(&hdmi->audio_mutex); +} + +void hdmi_audio_clk_disable(struct dw_hdmi *hdmi) +{ + if (!hdmi->audio_enable) + return; + + mutex_lock(&hdmi->audio_mutex); + hdmi_modb(hdmi, HDMI_MC_CLKDIS_AUDCLK_DISABLE, + HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); + hdmi->audio_enable = false; + mutex_unlock(&hdmi->audio_mutex); +} + +bool hdmi_get_connect_status(struct dw_hdmi *hdmi) +{ + return (hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD) ? true : false; +} + /* HDMI Initialization Step B.4 */ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) { @@ -1240,11 +1291,8 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); } -}
-static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi) -{ - hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); + hdmi_audio_clk_disable(hdmi); }
/* Workaround to clear the overflow condition */ @@ -1342,7 +1390,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
/* HDMI Initialization Step E - Configure audio */ hdmi_clk_regenerator_update_pixel_clock(hdmi); - hdmi_enable_audio_clk(hdmi); + hdmi_audio_clk_enable(hdmi);
/* HDMI Initialization Step F - Configure AVI InfoFrame */ hdmi_config_AVI(hdmi); @@ -1669,7 +1717,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, hdmi->plat_data = plat_data; hdmi->dev = dev; hdmi->dev_type = plat_data->dev_type; - hdmi->sample_rate = 48000; + hdmi->aud_fmt.sample_rate = 48000; hdmi->ratio = 100; hdmi->encoder = encoder;
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h index 603e645..3ab14b6 100644 --- a/drivers/gpu/drm/bridge/dw_hdmi.h +++ b/drivers/gpu/drm/bridge/dw_hdmi.h @@ -904,6 +904,12 @@ enum { HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08, HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
+/* AUD_CONF0 field values */ + AUDIO_CONF0_INTERFACE_MSK = 0x20, + AUDIO_CONF0_INTERFACE_II2S = 0x20, + AUDIO_CONF0_INTERFACE_SPDIF = 0x00, + AUDIO_CONF0_INTERFACE_GPA = 0x00, + /* AUD_N3 field values */ HDMI_AUD_N3_NCTS_ATOMIC_WRITE_MASK = 0x80, HDMI_AUD_N3_NCTS_ATOMIC_WRITE_SET = 0x80, diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h index 8476cfc..aafa447 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h @@ -44,6 +44,36 @@ struct dw_hdmi_sym_term { u16 term; /*transmission termination value*/ };
+enum hdmi_audio_wordlength { + AUDIO_WORDLENGTH_16BIT = 16, + AUDIO_WORDLENGTH_24BIT = 24, + AUDIO_CONF1_DATWIDTH_MSK = 0x1F, +}; + +enum hdmi_audio_daifmt { + AUDIO_DAIFMT_IIS = 0x00, + AUDIO_DAIFMT_RIGHT_J = 0x20, + AUDIO_DAIFMT_LEFT_J = 0x40, + AUDIO_DAIFMT_BURST_1 = 0x60, + AUDIO_DAIFMT_BURST_2 = 0x80, + AUDIO_CONF1_DATAMODE_MSK = 0xE0, +}; + +enum hdmi_audio_channelnum { + AUDIO_CHANNELNUM_2 = 0x01, + AUDIO_CHANNELNUM_4 = 0x03, + AUDIO_CHANNELNUM_6 = 0x07, + AUDIO_CHANNELNUM_8 = 0x0F, + AUDIO_CONF0_I2SINEN_MSK = 0x0F, +}; + +struct hdmi_audio_fmt { + unsigned int sample_rate; + enum hdmi_audio_daifmt dai_fmt; + enum hdmi_audio_channelnum chan_num; + enum hdmi_audio_wordlength word_length; +}; + struct dw_hdmi_plat_data { enum dw_hdmi_devtype dev_type; const struct dw_hdmi_mpll_config *mpll_cfg;