Hi,
On Mon, Mar 21, 2022 at 8:27 PM Vinod Polimera quic_vpolimer@quicinc.com wrote:
Set mdp clock to max clock rate during probe/bind sequence from the opp table so that rails are not at undetermined state. Since we do not know what will be the rate set in boot loader, it would be ideal to vote at max frequency. There could be a firmware display programmed in bootloader and we want to transition it to kernel without underflowing. The clock will be scaled down later when framework sends an update.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Vinod Polimera quic_vpolimer@quicinc.com Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org Reviewed-by: Douglas Anderson dianders@chromium.org
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++++++ 1 file changed, 8 insertions(+)
Just wanted to confirm that this patch will be queued up somewhat soon. I think it's good to go but I don't see it in any trees yet. ;-)
FWIW, I can also say that I've tested this patch and it fixes the underrun issues on sc7280-herobrine-rev1.
Tested-by: Douglas Anderson dianders@chromium.org
-Doug