https://bugzilla.kernel.org/show_bug.cgi?id=71891
--- Comment #36 from Alex Deucher alexdeucher@gmail.com --- (In reply to Dieter Nützel from comment #35)
(In reply to Alex Deucher from comment #33)
I wonder if UVD uses the reference clock directly, or if it uses xclk. If it uses xclk, they may explain the problems. Can you post your dmesg output with this patch applied?
Here is mine (with latest stuff from Christian):
[ 11.159443] [drm] initializing kernel modesetting (RV730 0x1002:0x9495 0x174B:0x0028).
[ 11.257005] [drm] ref: 2700, xclk: 2700
On your board (and most boards) they are the same, so your board would not be affected if this proves to be an issue.
[ 11.263794] radeon 0000:01:00.0: WB disabled <--- Is this intended?
On AGP cards, WB is disabled.