Hi,
On Fri, Mar 26, 2021 at 11:47:58AM +0200, Jani Nikula wrote:
On Tue, 23 Mar 2021, Ankit Nautiyal ankit.k.nautiyal@intel.com wrote:
Currently the FRL training mode (Concurrent, Sequential) and training type (Normal, Extended) are not defined properly and are passed as bool values in drm_helpers for pcon configuration for FRL training.
This patch: -Add register masks for Sequential and Normal FRL training options. -Fixes the drm_helpers for FRL Training configuration to use the appropriate masks. -Modifies the calls to the above drm_helpers in i915/intel_dp as per the above change.
v2: Re-used the register masks for these options, instead of enum. (Ville)
Signed-off-by: Ankit Nautiyal ankit.k.nautiyal@intel.com Reviewed-by: Ville Syrjälä ville.syrjala@linux.intel.com
Maarten, Maxime, Thomas -
Can I get an ack for merging this via drm-intel-next, please?
I was hoping that someone with either i915 or DP knowledge would comment, but the patch looks fine to me, you can go ahead I guess :)
Maxime