DRM color manager allows the driver to showcase its best color correction capabilities using the specific query property cm_coeff_after_ctm_property. The driver must loads the no. of coefficients for color correction as per the platform capability during the init time.
This patch adds no of coefficitents for best gamma color correction modes possible in CHV, in device info structure, which is: Gamma(10 bit, CGM HW unit): 257 coeff
These values will be loaded in cm_crtc_palette_capabilities_property during the CRTC init section, by color manager's attach function.
Signed-off-by: Shashank Sharma shashank.sharma@intel.com Signed-off-by: Kausal Malladi kausalmalladi@gmail.com --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/intel_color_manager.h | 3 +++ 2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 760e0ce..7780de4 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -34,6 +34,7 @@ #include "i915_drv.h" #include "i915_trace.h" #include "intel_drv.h" +#include "intel_color_manager.h"
#include <linux/console.h> #include <linux/module.h> @@ -349,6 +350,7 @@ static const struct intel_device_info intel_cherryview_info = { .gen = 8, .num_pipes = 3, .need_gfx_hws = 1, .has_hotplug = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, + .num_samples_after_ctm = CHV_10BIT_GAMMA_MAX_VALS, .is_valleyview = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h index eec52a7..a378fe1 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.h +++ b/drivers/gpu/drm/i915/intel_color_manager.h @@ -48,3 +48,6 @@ CLEAR_BITS(target, start_bit, no_bits); \ target |= (bit_pattern << start_bit); \ } while (0) + +/* CHV */ +#define CHV_10BIT_GAMMA_MAX_VALS 257