13 Apr
2020
13 Apr
'20
10:11 a.m.
On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec jernej.skrabec@siol.net wrote:
m divider in DDC clock register is 4 bits wide. Fix that.
Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support") Signed-off-by: Jernej Skrabec jernej.skrabec@siol.net
Reviewed-by: Chen-Yu Tsai wens@csie.org