The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address") added an adjustment of the FB_CEILING address. This is done by decrementing the address by one.
On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the display border, because the ceiling address is 8f276fff instead of 8f277000. Since this adjustment isn't necessary for the LCDC v2, the origin ceiling address should be used.
Signed-off-by: Daniel Schultz d.schultz@phytec.de --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 788999e..fe1d088 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -69,6 +69,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; struct drm_gem_cma_object *gem; unsigned int depth, bpp; dma_addr_t start, end; @@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) * unlikely that LCDC would fetch the DMA addresses in the middle of * an update. */ - dma_base_and_ceiling = (u64)(end - 1) << 32 | start; + if (priv->rev == 1) + end -= 1; + + dma_base_and_ceiling = (u64)end << 32 | start; tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
if (tilcdc_crtc->curr_fb)