On Tue, May 03, 2016 at 11:05:24AM -0400, Vitaly Prosyak wrote:
Cache in drm connector the edid range limits properties: min/max vertical refresh rates and max pixel clock. It would be used when enter to drr mode.
Signed-off-by: Vitaly Prosyak vitaly.prosyak@amd.com
Where's the patches that will use this? It might make sense to instead have some helper functions to compute these values, so that drivers can store them wherever they want/need. But impossible to tell without the users of this stuff. -Daniel
drivers/gpu/drm/drm_edid.c | 11 +++++++++++ include/drm/drm_crtc.h | 5 +++++ 2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 04cb487..7e49962 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2190,6 +2190,17 @@ do_inferred_modes(struct detailed_timing *timing, void *c) timing); break; case 0x01: /* just the ranges, no formula */
closure->connector->min_vfreq = range->min_vfreq;closure->connector->max_vfreq = range->max_vfreq;if (closure->edid->revision >= 4) {if ((range->flags & 0x03) == 0x3)closure->connector->min_vfreq += 255;if (range->flags & 0x02)closure->connector->max_vfreq += 255;}closure->connector->max_pixel_clock_khz =range_pixel_clock(closure->edid, (u8 *)timing);break;diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index c5b4b81..85fc554 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -1230,6 +1230,11 @@ struct drm_connector { uint8_t num_h_tile, num_v_tile; uint8_t tile_h_loc, tile_v_loc; uint16_t tile_h_size, tile_v_size;
- /*EDID range limits for drr*/
- int min_vfreq ;
- int max_vfreq ;
- int max_pixel_clock_khz;
};
/**
1.9.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel