Re: [PATCH 03/12] drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY

On 10/16, Archit Taneja wrote:

On 10/15/2015 02:05 AM, Stephen Boyd wrote:

...

On 10/14, Archit Taneja wrote:

...

• bytediv->hw.init = &bytediv_init;
• bytediv->reg = pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_CTRL_9;
• snprintf(parent, 32, "dsi%dvco_clk", pll_28nm->id);
• snprintf(clk_name, 32, "dsi%dpllbyte", pll_28nm->id);
• bytediv_init.name = clk_name;
• bytediv_init.ops = &clk_bytediv_ops;
• bytediv_init.flags = CLK_SET_RATE_PARENT;
• bytediv_init.parent_names = (const char *[]) { parent };

Can't we just do &parent instead of this anonymous array?

&parent doesn't make sense here. parent in this function is an array of characters, not a pointer to a character.

I can think of only this way. We do something similar when we call clk_register_mux() in dsi_pll_28nm.c.

Oh I missed that. Why not allocate the strings instead of putting them on the stack?