在 2022/3/21 16:29, Sui Jingfeng 写道:
From: suijingfeng suijingfeng@loongson.cn
The board name is LS3A4000_7A1000_EVB_BOARD_V1.4, it consist of 1.8Ghz mips64r5 4-core CPU and LS7A1000 bridge chip. It has PCIe GEN2 x8 slot, therefore can play with discrete graphics card.
Hi Jingfeng,
As we've discussed before if you are going to introduce new dts then you *MUST* include it in makefile and wire it up in code.
A dts file doing nothing lying in the tree is just suspicious.
Thanks. - Jiaxun
While the integrated display copntroller is equipped with a VGA output and a DVI output, the VGA is connect to the DVO0 output port of the display controller, the DVI is connected to DVO1 output port of the display controller.
+------+ +-----------------------------------+ | DDR4 | | +-------------------+ | +------+ | | PCIe Root complex | LS7A1000 | || MC0 | +--++---------++----+ |+----------+ HT 3.0 | || || | | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | +----------+ | +--------+ +-+--+-+ +---------+ +------+ || MC1 +---------------|--|----------------+ +------+ | | | DDR4 | +-------+ DVO0 | | DVO1 +------+ +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI +-------+ +------+
Signed-off-by: suijingfeng suijingfeng@loongson.cn Signed-off-by: Sui Jingfeng 15330273260@189.cn
.../boot/dts/loongson/ls3a4000_7a1000_evb.dts | 136 ++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts
diff --git a/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts new file mode 100644 index 000000000000..f467eddccdac --- /dev/null +++ b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi"
+/ {
- compatible = "loongson,loongson64g-4core-ls7a";
- model = "LS3A4000_7A1000_EVB_BOARD_V1.4";
- vga-encoder {
compatible = "adi,adv7123", "dumb-vga-dac";ports {#address-cells = <1>;#size-cells = <0>;port@0 {reg = <0>;adv7123_in: endpoint {remote-endpoint = <&dc_out_rgb0>;};};port@1 {reg = <1>;adv7123_out: endpoint {remote-endpoint = <&vga_connector_in>;};};};- };
- vga-connector {
compatible = "vga-connector";label = "vga";ddc-i2c-bus = <&i2c6>;port {vga_connector_in: endpoint {remote-endpoint = <&adv7123_out>;};};- };
- tfp410: dvi-encoder {
compatible = "ti,tfp410";ports {#address-cells = <1>;#size-cells = <0>;port@0 {reg = <0>;tfp410_in: endpoint {pclk-sample = <1>;bus-width = <24>;remote-endpoint = <&dc_out_rgb1>;};};port@1 {reg = <1>;tfp410_out: endpoint {remote-endpoint = <&dvi_connector_in>;};};};- };
- dvi-connector {
compatible = "dvi-connector";label = "dvi";digital;ddc-i2c-bus = <&i2c7>;port {dvi_connector_in: endpoint {remote-endpoint = <&tfp410_out>;};};- };
+};
+&package0 {
- htvec: interrupt-controller@efdfb000080 {
compatible = "loongson,htvec-1.0";reg = <0xefd 0xfb000080 0x40>;interrupt-controller;#interrupt-cells = <1>;interrupt-parent = <&liointc>;interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,<25 IRQ_TYPE_LEVEL_HIGH>,<26 IRQ_TYPE_LEVEL_HIGH>,<27 IRQ_TYPE_LEVEL_HIGH>,<28 IRQ_TYPE_LEVEL_HIGH>,<29 IRQ_TYPE_LEVEL_HIGH>,<30 IRQ_TYPE_LEVEL_HIGH>,<31 IRQ_TYPE_LEVEL_HIGH>;- };
+};
+&pch {
- msi: msi-controller@2ff00000 {
compatible = "loongson,pch-msi-1.0";reg = <0 0x2ff00000 0 0x8>;interrupt-controller;msi-controller;loongson,msi-base-vec = <64>;loongson,msi-num-vecs = <192>;interrupt-parent = <&htvec>;- };
+};
+&lsdc {
- ports {
#address-cells = <1>;#size-cells = <0>;port@0 {endpoint {remote-endpoint = <&adv7123_in>;};};port@1 {endpoint {remote-endpoint = <&tfp410_in>;};};- };
+};