Re: [PATCH v11 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver

Hi, Bo-Chen:

On Fri, 2022-06-10 at 18:55 +0800, Bo-Chen Chen wrote:

From: Markus Schneider-Pargmann msp@baylibre.com

This patch adds a embedded displayport driver for the MediaTek mt8195 SoC.

It supports the MT8195, the embedded DisplayPort units. It offers DisplayPort 1.4 with up to 4 lanes.

The driver creates a child device for the phy. The child device will never exist without the parent being active. As they are sharing a register range, the parent passes a regmap pointer to the child so that both can work with the same register range. The phy driver sets device data that is read by the parent to get the phy device that can be used to control the phy properties.

This driver is based on an initial version by Jitao shi jitao.shi@mediatek.com

Signed-off-by: Markus Schneider-Pargmann msp@baylibre.com Signed-off-by: Guillaume Ranquet granquet@baylibre.com [Bo-Chen: Cleanup the drivers and modify comments from reviewers] Signed-off-by: Bo-Chen Chen rex-bc.chen@mediatek.com

---

[snip]

+static int mtk_dp_train_start(struct mtk_dp *mtk_dp) +{

• int ret = 0;
• u8 lane_count;
• u8 link_rate;
• u8 train_limit;
• u8 max_link_rate;
• link_rate = mtk_dp->rx_cap[1];
• lane_count = mtk_dp->rx_cap[2] & 0x1F;
• mtk_dp->train_info.link_rate = min(mtk_dp->max_linkrate,

link_rate);

• mtk_dp->train_info.lane_count = min(mtk_dp->max_lanes,

lane_count);

• link_rate = mtk_dp->train_info.link_rate;
• lane_count = mtk_dp->train_info.lane_count;
• switch (link_rate) {
• case MTK_DP_LINKRATE_RBR:
• case MTK_DP_LINKRATE_HBR:
• case MTK_DP_LINKRATE_HBR2:
• case MTK_DP_LINKRATE_HBR25:
• case MTK_DP_LINKRATE_HBR3:

• break;
  

• default:

• mtk_dp->train_info.link_rate = MTK_DP_LINKRATE_HBR3;
  

• break;
  

• };
• max_link_rate = link_rate;
• for (train_limit = 6; train_limit > 0; train_limit--) {

• mtk_dp->train_info.cr_done = false;
  

• mtk_dp->train_info.eq_done = false;
  

• mtk_dp_train_change_mode(mtk_dp);
  

• ret = mtk_dp_train_flow(mtk_dp, link_rate, lane_count);
  

• if (ret)
  

• 	return ret;
  

• if (!mtk_dp->train_info.cr_done) {
  

When mtk_dp_train_flow() return 0, it imply train_info.cr_done is true, isn't it?

• 	switch (link_rate) {
  

• 	case MTK_DP_LINKRATE_RBR:
  

• 		lane_count = lane_count / 2;
  

• 		link_rate = max_link_rate;
  

• 		if (lane_count == 0)
  

• 			return -EIO;
  

• 		break;
  

• 	case MTK_DP_LINKRATE_HBR:
  

• 		link_rate = MTK_DP_LINKRATE_RBR;
  

• 		break;
  

• 	case MTK_DP_LINKRATE_HBR2:
  

• 		link_rate = MTK_DP_LINKRATE_HBR;
  

• 		break;
  

• 	case MTK_DP_LINKRATE_HBR3:
  

• 		link_rate = MTK_DP_LINKRATE_HBR2;
  

• 		break;
  

• 	default:
  

• 		return -EINVAL;
  

• 	};
  

• } else if (!mtk_dp->train_info.eq_done) {
  

When mtk_dp_train_flow() return 0, it imply train_info.eq_done is true, isn't it?

Regards, CK

• 	if (lane_count == 0)
  

• 		return -EIO;
  

• 	lane_count /= 2;
  

• } else {
  

• 	break;
  

• }
  

• }
• if (train_limit == 0)

• return -ETIMEDOUT;
  

• return 0;

+}