Implement Daniel Stone's recommendation to not read registers to infer the hardware's state.
v2: Read GAMMA_MODE register value at init
Signed-off-by: Lionel Landwerlin lionel.g.landwerlin@intel.com --- drivers/gpu/drm/i915/intel_color.c | 17 +++++++++++++---- drivers/gpu/drm/i915/intel_drv.h | 3 +++ 2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index 5e0b997..f6bf9f1 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *intel_crtc_state = + to_intel_crtc_state(crtc->state); bool reenable_ips = false;
/* @@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc) * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled. */ if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled && - ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) == - GAMMA_MODE_MODE_SPLIT)) { + (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) { hsw_disable_ips(intel_crtc); reenable_ips = true; } + + intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT; I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
i9xx_load_luts(crtc); @@ -173,6 +176,8 @@ void intel_color_init(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *intel_crtc_state = + to_intel_crtc_state(crtc->state); int i;
drm_mode_crtc_set_gamma_size(crtc, 256); @@ -183,8 +188,12 @@ void intel_color_init(struct drm_crtc *crtc) }
if (IS_HASWELL(dev) || - (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) + (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) { dev_priv->display.load_luts = haswell_load_luts; - else + + intel_crtc_state->gamma_mode = + I915_READ(GAMMA_MODE(intel_crtc->pipe)); + } else { dev_priv->display.load_luts = i9xx_load_luts; + } } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 40fc486..9742d5b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -517,6 +517,9 @@ struct intel_crtc_state { struct skl_pipe_wm skl; } optimal; } wm; + + /* Gamma mode programmed on the pipe */ + uint32_t gamma_mode; };
struct vlv_wm_state {