On Thu, Feb 15, 2018 at 06:54:48PM +0100, Giulio Benetti wrote:
Differently from other Lcd signals, HSYNC and VSYNC signals result inverted if their bits are cleared to 0.
Invert their settings of IO_POL register.
Signed-off-by: Giulio Benetti giulio.benetti@micronovasrl.com
Applied, thanks! Maxime