On Wed, Mar 7, 2012 at 9:23 PM, Chris Wilson chris@chris-wilson.co.uk wrote:
On Wed, 7 Mar 2012 19:50:43 +0800, Daniel Kurtz djkurtz@chromium.org wrote:
According to i915 documentation [1], "Port D" (DP/HDMI Port D) is actually gmbus pin pair 6 (gmbus0.2:0 == 110b GPIOF), not 7 (111b). Pin pair 7 is a reserved pair.
[1] Documentation for [DevSNB+] and [DevIBX], as found on http://intellinuxgraphics.org
The problem is I took those definitions from the gen2 specs, and munged in the obvious changes with gen3... And it appears that the GPIO pin assignment versus GMBUS has changed over the years. And so the can of worms is opened!
I'm not sure what exactly you mean by gen2 and gen3 specs, but, as far as I can tell, the GPIO pin assignment is the same for both Cougar Point (Sandy Bridge) [1] and Ibex Peak (?) [2]. Although, the documentation is a bit confusing and it is difficult to tell.
[1] http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf [2] http://intellinuxgraphics.org/IHD_OS_Vol3_Part3r2.pdf
What do you mean exactly by gen2 & gen3? Can you point to docs?
-Chris
-- Chris Wilson, Intel Open Source Technology Centre