The function drm_edp_backlight_init() is defined such that the "driver_pwm_freq_hz" parameter is optional--it's 0 if you don't want to futz with it. If you follow this variable through, you'll find out that if it's 0 we won't ever set the "bl->pwmgen_bit_count", leaving it as 0.
That means that before using it in drm_edp_backlight_enable() we need to check to see if it's non-zero.
Programming this field to zero was confusing the panel I tested with (Samsung ATNA33XC20). The backlight still worked somewhat but the brightness values didn't correspond to what they should have been.
Fixes: 867cf9cd73c3 ("drm/dp: Extract i915's eDP backlight code into DRM helpers") Signed-off-by: Douglas Anderson dianders@chromium.org Reviewed-by: Sean Paul seanpaul@chromium.org ---
(no changes since v1)
drivers/gpu/drm/drm_dp_helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index b5f75ca05774..b8a5c5e49d74 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -3229,10 +3229,12 @@ int drm_edp_backlight_enable(struct drm_dp_aux *aux, const struct drm_edp_backli new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
- ret = drm_dp_dpcd_writeb(aux, DP_EDP_PWMGEN_BIT_COUNT, bl->pwmgen_bit_count); - if (ret != 1) - drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", - aux->name, ret); + if (bl->pwmgen_bit_count) { + ret = drm_dp_dpcd_writeb(aux, DP_EDP_PWMGEN_BIT_COUNT, bl->pwmgen_bit_count); + if (ret != 1) + drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", + aux->name, ret); + } }
if (bl->pwm_freq_pre_divider) {