Signed-off-by: Andy Yan andy.yan@rock-chips.com
---
Changes in v14: None Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - correct some spelling mistake - modify ddc-i2c-bus and interrupt description
Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None
.../devicetree/bindings/drm/bridge/dw_hdmi.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt
diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt new file mode 100644 index 0000000..107c1ca --- /dev/null +++ b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt @@ -0,0 +1,40 @@ +DesignWare HDMI bridge bindings + +Required properities: +- compatible: platform specific such as: + * "fsl,imx6q-hdmi" + * "fsl,imx6dl-hdmi" + * "rockchip,rk3288-dw-hdmi" +- reg: Physical base address and length of the controller's registers. +- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing +- interrupts: The HDMI interrupt number + +Optional properties +- reg-io-width: the width of the reg:1,4, default set to 1 if not present + +Example: + hdmi: hdmi@0120000 { + compatible = "fsl,imx6q-hdmi"; + reg = <0x00120000 0x9000>; + interrupts = <0 115 0x04>; + gpr = <&gpr>; + clocks = <&clks 123>, <&clks 124>; + clock-names = "iahb", "isfr"; + ddc-i2c-bus = <&i2c2>; + + port@0 { + reg = <0>; + + hdmi_mux_0: endpoint { + remote-endpoint = <&ipu1_di0_hdmi>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_mux_1: endpoint { + remote-endpoint = <&ipu1_di1_hdmi>; + }; + }; + };