[PATCH 1/2] drm/amdgpu: add return value for pci config reset

From: Chunming Zhou David1.Zhou@amd.com

So we know whether or not the reset succeeded.

Signed-off-by: Chunming Zhou David1.Zhou@amd.com Reviewed-by: Christian König christian.koenig@amd.com Reviewed-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/amd/amdgpu/cik.c | 14 ++++++++++---- drivers/gpu/drm/amd/amdgpu/vi.c | 12 +++++++----- 2 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c index 07bc795..924c85c 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik.c +++ b/drivers/gpu/drm/amd/amdgpu/cik.c @@ -1152,10 +1152,11 @@ static void kv_restore_regs_for_reset(struct amdgpu_device *adev, WREG32(mmGMCON_RENG_EXECUTE, save->gmcon_reng_execute); }

-static void cik_gpu_pci_config_reset(struct amdgpu_device *adev) +static int cik_gpu_pci_config_reset(struct amdgpu_device *adev) { struct kv_reset_save_regs kv_save = { 0 }; u32 i; + int r = -EINVAL;

dev_info(adev->dev, "GPU pci config reset\n");

@@ -1171,14 +1172,18 @@ static void cik_gpu_pci_config_reset(struct amdgpu_device *adev)

/* wait for asic to come out of reset */ for (i = 0; i < adev->usec_timeout; i++) { - if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) + if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) { + r = 0; break; + } udelay(1); }

/* does asic init need to be run first??? */ if (adev->flags & AMD_IS_APU) kv_restore_regs_for_reset(adev, &kv_save); + + return r; }

static void cik_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hung) @@ -1204,13 +1209,14 @@ static void cik_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hu */ static int cik_asic_reset(struct amdgpu_device *adev) { + int r; cik_set_bios_scratch_engine_hung(adev, true);

- cik_gpu_pci_config_reset(adev); + r = cik_gpu_pci_config_reset(adev);

cik_set_bios_scratch_engine_hung(adev, false);

- return 0; + return r; }

static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock, diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 38bcc05..dcc937e 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -583,7 +583,7 @@ static int vi_read_register(struct amdgpu_device *adev, u32 se_num, return -EINVAL; }

-static void vi_gpu_pci_config_reset(struct amdgpu_device *adev) +static int vi_gpu_pci_config_reset(struct amdgpu_device *adev) { u32 i;

@@ -599,10 +599,10 @@ static void vi_gpu_pci_config_reset(struct amdgpu_device *adev) /* wait for asic to come out of reset */ for (i = 0; i < adev->usec_timeout; i++) { if (RREG32(mmCONFIG_MEMSIZE) != 0xffffffff) - break; + return 0; udelay(1); } - + return -EINVAL; }

static void vi_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hung) @@ -628,13 +628,15 @@ static void vi_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hun */ static int vi_asic_reset(struct amdgpu_device *adev) { + int r; + vi_set_bios_scratch_engine_hung(adev, true);

- vi_gpu_pci_config_reset(adev); + r = vi_gpu_pci_config_reset(adev);

vi_set_bios_scratch_engine_hung(adev, false);

- return 0; + return r; }

static int vi_set_uvd_clock(struct amdgpu_device *adev, u32 clock,