The get_memory_bandwidth_limit() in dispc_ops can be used to query the memory bandwidth limit of dispc by upper layers.
Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 13 +++++++++++++ drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 ++ 2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 0f4fdb221498..90f9ad89af0d 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -4325,6 +4325,17 @@ static void dispc_free_irq(void *dev_id) dispc.user_data = NULL; }
+static u32 dispc_get_memory_bandwidth_limit(void) +{ + u32 limit = 0; + + /* Optional maximum memory bandwidth */ + of_property_read_u32(dispc.pdev->dev.of_node, "max-memory-bandwidth", + &limit); + + return limit; +} + /* * Workaround for errata i734 in DSS dispc * - LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled @@ -4497,6 +4508,8 @@ static const struct dispc_ops dispc_ops = { .get_num_ovls = dispc_get_num_ovls, .get_num_mgrs = dispc_get_num_mgrs,
+ .get_memory_bandwidth_limit = dispc_get_memory_bandwidth_limit, + .mgr_enable = dispc_mgr_enable, .mgr_is_enabled = dispc_mgr_is_enabled, .mgr_get_vsync_irq = dispc_mgr_get_vsync_irq, diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 990422b35784..c2166d2d3f29 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -695,6 +695,8 @@ struct dispc_ops { int (*get_num_ovls)(void); int (*get_num_mgrs)(void);
+ u32 (*get_memory_bandwidth_limit)(void); + void (*mgr_enable)(enum omap_channel channel, bool enable); bool (*mgr_is_enabled)(enum omap_channel channel); u32 (*mgr_get_vsync_irq)(enum omap_channel channel);