The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303ba047..956848068871 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3200,7 +3200,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SM8250_MMCX>;
interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>;
ports { #address-cells = <1>; @@ -3252,7 +3252,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, @@ -3325,7 +3325,7 @@ dsi1: dsi@ae96000 { reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>;
clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,