Re: [PATCH 00/11 v3] fix gmbus writes and related issues

On Mon, Mar 26, 2012 at 10:26:39PM +0800, Daniel Kurtz wrote:

This patchset addresses a couple of issues with the i915 gmbus implementation:

• fixes misassigned pin port pair for HDMI-D
• fixes write transactions when they are the only transaction requested (including large >4-byte writes) by terminating every transaction with a WAIT cycle.
• returns -ENXIO and -ETIMEDOUT as appropriate so upper layers can handled i2c transaction failures
• optimizes the typical read transaction case by using the INDEX cycle

v3:

• rebased onto Daniel Vetter's drm-intel-next-queued branch at git://people.freedesktop.org/~danvet/drm-intel
• replace intel_i2c_quirk_xfer with pre/post_xfer i2c routines
• pre-allocate gmbus array
• drop interrupt approach since I could not make it stable, probably due to difficulty in clearing and resetting the GMBUS interrupt which is buffered behind the SDE's PCH interrupt.
• Fix zero-length writes
• Wait for IDLE before clearing NAK

Ok, I've found a few more things to complain about ;-) I haven't looked to closely add the later patches that fix up the actual gmbus code, but on a quick read I don't see any issues there - I'll cross check the code somewhen later with Bspec.

Yours, Daniel