On 28-03-22, 13:21, Rob Herring wrote:
On Mon, Mar 28, 2022 at 12:18 PM Krzysztof Kozlowski krzysztof.kozlowski@linaro.org wrote:
On 28/03/2022 19:16, Vinod Koul wrote:
On 28-03-22, 19:43, Dmitry Baryshkov wrote:
On Mon, 28 Mar 2022 at 18:30, Krzysztof Kozlowski krzysztof.kozlowski@linaro.org wrote:
The DSI node is not a bus and the children do not have unit addresses.
Reported-by: Vinod Koul vkoul@kernel.org Signed-off-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org
NAK. DSI panels are children of the DSI device tree node with the reg = <0>; address. This is the convention used by other platforms too (see e.g. arch/arm64/boot/dts/freescale/imx8mq-evk.dts).
So we should add reg = 0, i will update my dtsi fix
To "ports" node? No. The reg=0 is for children of the bus, so the panels. How to combine both without warnings - ports and panel@0 - I don't know yet...
I don't think that should case a warning. Or at least it's one we turn off.
Well in this case I think we might need a fix: Here is the example quoted in the binding. We have ports{} and then the two port@0 and port@1 underneath.
So it should be okay to drop #address-cells/#size-cells from dsi node but keep in ports node...
Thoughts...?
dsi@ae94000 { compatible = "qcom,mdss-dsi-ctrl"; reg = <0x0ae94000 0x400>; reg-names = "dsi_ctrl";
#address-cells = <1>; #size-cells = <0>;
interrupt-parent = <&mdss>; interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, <&dispcc DISP_CC_MDSS_PCLK0_CLK>, <&dispcc DISP_CC_MDSS_ESC0_CLK>, <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_AXI_CLK>; clock-names = "byte", "byte_intf", "pixel", "core", "iface", "bus";
phys = <&dsi0_phy>; phy-names = "dsi";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
power-domains = <&rpmhpd SC7180_CX>; operating-points-v2 = <&dsi_opp_table>;
ports { #address-cells = <1>; #size-cells = <0>;
port@0 { reg = <0>; dsi0_in: endpoint { remote-endpoint = <&dpu_intf1_out>; }; };
port@1 { reg = <1>; dsi0_out: endpoint { remote-endpoint = <&sn65dsi86_in>; data-lanes = <0 1 2 3>; }; }; }; };
Rob