On Tue, Sep 7, 2021 at 4:01 AM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Fix the remaining warnings and finally enable this.
Signed-off-by: Christian König christian.koenig@amd.com
Reviewed-by: Alex Deucher alexander.deucher@amd.com
Documentation/gpu/drm-mm.rst | 9 +++++++++ include/drm/ttm/ttm_pool.h | 5 +++-- 2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst index 69c4a20b95d0..e0538083a2c0 100644 --- a/Documentation/gpu/drm-mm.rst +++ b/Documentation/gpu/drm-mm.rst @@ -67,6 +67,15 @@ TTM TT object reference .. kernel-doc:: drivers/gpu/drm/ttm/ttm_tt.c :export:
+TTM page pool reference +-----------------------
+.. kernel-doc:: include/drm/ttm/ttm_pool.h
- :internal:
+.. kernel-doc:: drivers/gpu/drm/ttm/ttm_pool.c
- :export:
The Graphics Execution Manager (GEM)
diff --git a/include/drm/ttm/ttm_pool.h b/include/drm/ttm/ttm_pool.h index 4321728bdd11..ef09b23d29e3 100644 --- a/include/drm/ttm/ttm_pool.h +++ b/include/drm/ttm/ttm_pool.h @@ -37,7 +37,7 @@ struct ttm_pool; struct ttm_operation_ctx;
/**
- ttm_pool_type - Pool for a certain memory type
- struct ttm_pool_type - Pool for a certain memory type
- @pool: the pool we belong to, might be NULL for the global ones
- @order: the allocation order our pages have
@@ -58,8 +58,9 @@ struct ttm_pool_type { };
/**
- ttm_pool - Pool for all caching and orders
- struct ttm_pool - Pool for all caching and orders
- @dev: the device we allocate pages for
- @use_dma_alloc: if coherent DMA allocations should be used
- @use_dma32: if GFP_DMA32 should be used
- @caching: pools for each caching/order
-- 2.25.1