DRM has built-in support for variable refresh properties on the connector and CRTC. Make use of these instead of the amdpgu specific freesync properties.
The connector properties freesync and freesync_capable are replaced with variable_refresh_enabled and variable_refresh_capable.
The CRTC property freesync_enable is replaced with the variable_refresh property.
The old FreeSync properties are no longer accessible from userspace and the DRM properties should be instead for enabling/disabling variable refresh support.
Change-Id: I7c8117c09282a938c87292402af39d22e4eb823b Signed-off-by: Nicholas Kazlauskas nicholas.kazlauskas@amd.com --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 50 +++++++------------ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 -- 2 files changed, 18 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 56598ed53123..d28bab0f4657 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1632,7 +1632,7 @@ static int amdgpu_notify_freesync(struct drm_device *dev, void *data, new_crtc_state = drm_atomic_get_new_crtc_state(state, &acrtc->base); dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
- dm_new_crtc_state->freesync_enabled = enable; + dm_new_crtc_state->base.variable_refresh = enable; }
ret = drm_atomic_commit(state); @@ -2541,7 +2541,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
update_stream_signal(stream);
- if (dm_state && dm_state->freesync_capable) + if (dm_state && dm_state->base.variable_refresh_capable) stream->ignore_msa_timing_param = true; finish: if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL) @@ -2611,7 +2611,6 @@ dm_crtc_duplicate_state(struct drm_crtc *crtc)
state->adjust = cur->adjust; state->vrr_infopacket = cur->vrr_infopacket; - state->freesync_enabled = cur->freesync_enabled;
/* TODO Duplicate dc_stream after objects are stream object is flattened */
@@ -2722,12 +2721,6 @@ int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connector, } else if (property == adev->mode_info.underscan_property) { dm_new_state->underscan_enable = val; ret = 0; - } else if (property == adev->mode_info.freesync_property) { - dm_new_state->freesync_enable = val; - ret = 0; - } else if (property == adev->mode_info.freesync_capable_property) { - dm_new_state->freesync_capable = val; - ret = 0; }
return ret; @@ -2770,12 +2763,6 @@ int amdgpu_dm_connector_atomic_get_property(struct drm_connector *connector, } else if (property == adev->mode_info.underscan_property) { *val = dm_state->underscan_enable; ret = 0; - } else if (property == adev->mode_info.freesync_property) { - *val = dm_state->freesync_enable; - ret = 0; - } else if (property == adev->mode_info.freesync_capable_property) { - *val = dm_state->freesync_capable; - ret = 0; } return ret; } @@ -2839,9 +2826,6 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector)
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
- new_state->freesync_capable = state->freesync_capable; - new_state->freesync_enable = state->freesync_enable; - return &new_state->base; }
@@ -3602,10 +3586,8 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
if (connector_type == DRM_MODE_CONNECTOR_HDMIA || connector_type == DRM_MODE_CONNECTOR_DisplayPort) { - drm_object_attach_property(&aconnector->base.base, - adev->mode_info.freesync_property, 0); - drm_object_attach_property(&aconnector->base.base, - adev->mode_info.freesync_capable_property, 0); + drm_connector_attach_variable_refresh_properties( + &aconnector->base); } }
@@ -4123,7 +4105,8 @@ static bool commit_planes_to_stream( stream_update->dst = dc_stream->dst; stream_update->out_transfer_func = dc_stream->out_transfer_func;
- if (dm_new_crtc_state->freesync_enabled != dm_old_crtc_state->freesync_enabled) { + if (dm_new_crtc_state->base.variable_refresh != + dm_old_crtc_state->base.variable_refresh) { stream_update->vrr_infopacket = &dc_stream->vrr_infopacket; stream_update->adjust = &dc_stream->adjust; } @@ -4695,9 +4678,9 @@ void set_freesync_on_stream(struct amdgpu_display_manager *dm, struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(new_con_state->base.connector);
- if (new_con_state->freesync_capable && - new_con_state->freesync_enable) { - config.state = new_crtc_state->freesync_enabled ? + if (new_con_state->base.variable_refresh_capable && + new_con_state->base.variable_refresh_enabled) { + config.state = new_crtc_state->base.variable_refresh ? VRR_STATE_ACTIVE_VARIABLE : VRR_STATE_INACTIVE; config.min_refresh_in_uhz = @@ -4800,7 +4783,8 @@ static int dm_update_crtcs_state(struct amdgpu_display_manager *dm, } }
- if (dm_old_crtc_state->freesync_enabled != dm_new_crtc_state->freesync_enabled) + if (dm_old_crtc_state->base.variable_refresh != + dm_new_crtc_state->base.variable_refresh) new_crtc_state->mode_changed = true;
if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) @@ -5089,7 +5073,8 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
if (!drm_atomic_crtc_needs_modeset(new_crtc_state) && !new_crtc_state->color_mgmt_changed && - (dm_old_crtc_state->freesync_enabled == dm_new_crtc_state->freesync_enabled)) + (dm_old_crtc_state->base.variable_refresh == + dm_new_crtc_state->base.variable_refresh)) continue;
if (!new_crtc_state->enable) @@ -5241,8 +5226,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->max_vfreq = 0; amdgpu_dm_connector->pixel_clock_mhz = 0;
- dm_con_state->freesync_capable = false; - dm_con_state->freesync_enable = false; + dm_con_state->base.variable_refresh_capable = false; + return; }
@@ -5266,7 +5251,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector); } } - dm_con_state->freesync_capable = false; + dm_con_state->base.variable_refresh_capable = false; + if (edid_check_required == true && (edid->version > 1 || (edid->version == 1 && edid->revision > 1))) { for (i = 0; i < 4; i++) { @@ -5298,7 +5284,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) {
- dm_con_state->freesync_capable = true; + dm_con_state->base.variable_refresh_capable = true; } } } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 85cfa2cbd8ec..451b06859379 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -195,7 +195,6 @@ struct dm_crtc_state { int crc_skip_count; bool crc_enabled;
- bool freesync_enabled; struct dc_crtc_timing_adjust adjust; struct dc_info_packet vrr_infopacket; }; @@ -217,8 +216,6 @@ struct dm_connector_state { uint8_t underscan_vborder; uint8_t underscan_hborder; bool underscan_enable; - bool freesync_enable; - bool freesync_capable; };
#define to_dm_connector_state(x)\