On Mon, Oct 27, 2014 at 10:14 AM, Joe Perches joe@perches.com wrote:
Precedence of & and >> is not the same and is not left to right. shift has higher precedence and should be done after the mask.
Add parentheses around the mask.
Use the already #defined values instead of hardcoding.
Signed-off-by: Joe Perches joe@perches.com
I think this should be NUM_SHADER_ENGINES_SHIFT?
(Joe can't type)
exactly right, thanks Michel
Applied with a compile fix.
Thanks,
Alex
drivers/gpu/drm/radeon/evergreen.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index a31f1ca..a97a685 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -3303,7 +3303,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) rdev->config.evergreen.tile_config |= ((gb_addr_config & 0x30000000) >> 28) << 12;
num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1;
num_shader_engines = ((gb_addr_config & NUM_SHADER_ENGINES_MASK)>> NUM_SHADER_ENGINES_SHIFT) + 1; if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { u32 efuse_straps_4;
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