tree: git://anongit.freedesktop.org/drm-intel for-linux-next head: a883241c3922000b21b58b5740c55badfe09940f commit: 0a03852e049af91da9ae70326c44bb5d9b0d377a [18/27] drm/i915: support 2M pages for the 48b PPGTT config: x86_64-randconfig-a0-10072329 (attached as .config) compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7 reproduce: git checkout 0a03852e049af91da9ae70326c44bb5d9b0d377a # save the attached .config to linux build tree make ARCH=x86_64
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen8_ppgtt_insert_3lvl': drivers/gpu/drm/i915/i915_gem_gtt.c:1007: warning: 'iter.sg' is used uninitialized in this function drivers/gpu/drm/i915/i915_gem_gtt.c:1008: warning: 'iter.dma' is used uninitialized in this function drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen8_ppgtt_insert_4lvl':
drivers/gpu/drm/i915/i915_gem_gtt.c:1087: warning: 'iter' is used uninitialized in this function
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'intel_ppat_get': drivers/gpu/drm/i915/i915_gem_gtt.c:2969: warning: 'entry' may be used uninitialized in this function
vim +/iter +1087 drivers/gpu/drm/i915/i915_gem_gtt.c
9df15b499 Ben Widawsky 2013-11-02 998 894ccebee Chris Wilson 2017-02-15 999 static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm, 4a234c5fa Matthew Auld 2017-06-22 1000 struct i915_vma *vma, f9b5b782c Michel Thierry 2015-07-30 1001 enum i915_cache_level cache_level, f9b5b782c Michel Thierry 2015-07-30 1002 u32 unused) f9b5b782c Michel Thierry 2015-07-30 1003 { 17369ba08 Chuanxiao Dong 2017-07-07 1004 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm); 894ccebee Chris Wilson 2017-02-15 1005 struct sgt_dma iter = { 4a234c5fa Matthew Auld 2017-06-22 1006 .sg = vma->pages->sgl, 894ccebee Chris Wilson 2017-02-15 @1007 .dma = sg_dma_address(iter.sg), 894ccebee Chris Wilson 2017-02-15 1008 .max = iter.dma + iter.sg->length, 894ccebee Chris Wilson 2017-02-15 1009 }; 4a234c5fa Matthew Auld 2017-06-22 1010 struct gen8_insert_pte idx = gen8_insert_pte(vma->node.start); de5ba8eb9 Michel Thierry 2015-08-03 1011 9e89f9ee3 Chris Wilson 2017-02-25 1012 gen8_ppgtt_insert_pte_entries(ppgtt, &ppgtt->pdp, &iter, &idx, 9e89f9ee3 Chris Wilson 2017-02-25 1013 cache_level); de5ba8eb9 Michel Thierry 2015-08-03 1014 } 894ccebee Chris Wilson 2017-02-15 1015 0a03852e0 Matthew Auld 2017-10-06 1016 static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma, 0a03852e0 Matthew Auld 2017-10-06 1017 struct i915_page_directory_pointer **pdps, 0a03852e0 Matthew Auld 2017-10-06 1018 struct sgt_dma *iter, 0a03852e0 Matthew Auld 2017-10-06 1019 enum i915_cache_level cache_level) 0a03852e0 Matthew Auld 2017-10-06 1020 { 0a03852e0 Matthew Auld 2017-10-06 1021 const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level); 0a03852e0 Matthew Auld 2017-10-06 1022 u64 start = vma->node.start; 0a03852e0 Matthew Auld 2017-10-06 1023 dma_addr_t rem = iter->sg->length; 0a03852e0 Matthew Auld 2017-10-06 1024 0a03852e0 Matthew Auld 2017-10-06 1025 do { 0a03852e0 Matthew Auld 2017-10-06 1026 struct gen8_insert_pte idx = gen8_insert_pte(start); 0a03852e0 Matthew Auld 2017-10-06 1027 struct i915_page_directory_pointer *pdp = pdps[idx.pml4e]; 0a03852e0 Matthew Auld 2017-10-06 1028 struct i915_page_directory *pd = pdp->page_directory[idx.pdpe]; 0a03852e0 Matthew Auld 2017-10-06 1029 unsigned int page_size; 0a03852e0 Matthew Auld 2017-10-06 1030 gen8_pte_t encode = pte_encode; 0a03852e0 Matthew Auld 2017-10-06 1031 gen8_pte_t *vaddr; 0a03852e0 Matthew Auld 2017-10-06 1032 u16 index, max; 0a03852e0 Matthew Auld 2017-10-06 1033 0a03852e0 Matthew Auld 2017-10-06 1034 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M && 0a03852e0 Matthew Auld 2017-10-06 1035 IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) && 0a03852e0 Matthew Auld 2017-10-06 1036 rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) { 0a03852e0 Matthew Auld 2017-10-06 1037 index = idx.pde; 0a03852e0 Matthew Auld 2017-10-06 1038 max = I915_PDES; 0a03852e0 Matthew Auld 2017-10-06 1039 page_size = I915_GTT_PAGE_SIZE_2M; 0a03852e0 Matthew Auld 2017-10-06 1040 0a03852e0 Matthew Auld 2017-10-06 1041 encode |= GEN8_PDE_PS_2M; 0a03852e0 Matthew Auld 2017-10-06 1042 0a03852e0 Matthew Auld 2017-10-06 1043 vaddr = kmap_atomic_px(pd); 0a03852e0 Matthew Auld 2017-10-06 1044 } else { 0a03852e0 Matthew Auld 2017-10-06 1045 struct i915_page_table *pt = pd->page_table[idx.pde]; 0a03852e0 Matthew Auld 2017-10-06 1046 0a03852e0 Matthew Auld 2017-10-06 1047 index = idx.pte; 0a03852e0 Matthew Auld 2017-10-06 1048 max = GEN8_PTES; 0a03852e0 Matthew Auld 2017-10-06 1049 page_size = I915_GTT_PAGE_SIZE; 0a03852e0 Matthew Auld 2017-10-06 1050 0a03852e0 Matthew Auld 2017-10-06 1051 vaddr = kmap_atomic_px(pt); 0a03852e0 Matthew Auld 2017-10-06 1052 } 0a03852e0 Matthew Auld 2017-10-06 1053 0a03852e0 Matthew Auld 2017-10-06 1054 do { 0a03852e0 Matthew Auld 2017-10-06 1055 GEM_BUG_ON(iter->sg->length < page_size); 0a03852e0 Matthew Auld 2017-10-06 1056 vaddr[index++] = encode | iter->dma; 0a03852e0 Matthew Auld 2017-10-06 1057 0a03852e0 Matthew Auld 2017-10-06 1058 start += page_size; 0a03852e0 Matthew Auld 2017-10-06 1059 iter->dma += page_size; 0a03852e0 Matthew Auld 2017-10-06 1060 rem -= page_size; 0a03852e0 Matthew Auld 2017-10-06 1061 if (iter->dma >= iter->max) { 0a03852e0 Matthew Auld 2017-10-06 1062 iter->sg = __sg_next(iter->sg); 0a03852e0 Matthew Auld 2017-10-06 1063 if (!iter->sg) 0a03852e0 Matthew Auld 2017-10-06 1064 break; 0a03852e0 Matthew Auld 2017-10-06 1065 0a03852e0 Matthew Auld 2017-10-06 1066 rem = iter->sg->length; 0a03852e0 Matthew Auld 2017-10-06 1067 iter->dma = sg_dma_address(iter->sg); 0a03852e0 Matthew Auld 2017-10-06 1068 iter->max = iter->dma + rem; 0a03852e0 Matthew Auld 2017-10-06 1069 0a03852e0 Matthew Auld 2017-10-06 1070 if (unlikely(!IS_ALIGNED(iter->dma, page_size))) 0a03852e0 Matthew Auld 2017-10-06 1071 break; 0a03852e0 Matthew Auld 2017-10-06 1072 } 0a03852e0 Matthew Auld 2017-10-06 1073 } while (rem >= page_size && index < max); 0a03852e0 Matthew Auld 2017-10-06 1074 0a03852e0 Matthew Auld 2017-10-06 1075 kunmap_atomic(vaddr); 0a03852e0 Matthew Auld 2017-10-06 1076 } while (iter->sg); 0a03852e0 Matthew Auld 2017-10-06 1077 } 0a03852e0 Matthew Auld 2017-10-06 1078 894ccebee Chris Wilson 2017-02-15 1079 static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm, 4a234c5fa Matthew Auld 2017-06-22 1080 struct i915_vma *vma, 894ccebee Chris Wilson 2017-02-15 1081 enum i915_cache_level cache_level, 894ccebee Chris Wilson 2017-02-15 1082 u32 unused) 894ccebee Chris Wilson 2017-02-15 1083 { 894ccebee Chris Wilson 2017-02-15 1084 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm); 894ccebee Chris Wilson 2017-02-15 1085 struct sgt_dma iter = { 4a234c5fa Matthew Auld 2017-06-22 1086 .sg = vma->pages->sgl, 894ccebee Chris Wilson 2017-02-15 @1087 .dma = sg_dma_address(iter.sg), 894ccebee Chris Wilson 2017-02-15 1088 .max = iter.dma + iter.sg->length, 894ccebee Chris Wilson 2017-02-15 1089 }; 894ccebee Chris Wilson 2017-02-15 1090 struct i915_page_directory_pointer **pdps = ppgtt->pml4.pdps; 0a03852e0 Matthew Auld 2017-10-06 1091 0a03852e0 Matthew Auld 2017-10-06 1092 if (vma->page_sizes.sg > I915_GTT_PAGE_SIZE) { 0a03852e0 Matthew Auld 2017-10-06 1093 gen8_ppgtt_insert_huge_entries(vma, pdps, &iter, cache_level); 0a03852e0 Matthew Auld 2017-10-06 1094 } else { 4a234c5fa Matthew Auld 2017-06-22 1095 struct gen8_insert_pte idx = gen8_insert_pte(vma->node.start); 894ccebee Chris Wilson 2017-02-15 1096 0a03852e0 Matthew Auld 2017-10-06 1097 while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[idx.pml4e++], 0a03852e0 Matthew Auld 2017-10-06 1098 &iter, &idx, cache_level)) 9e89f9ee3 Chris Wilson 2017-02-25 1099 GEM_BUG_ON(idx.pml4e >= GEN8_PML4ES_PER_PML4); f9b5b782c Michel Thierry 2015-07-30 1100 } 0a03852e0 Matthew Auld 2017-10-06 1101 } f9b5b782c Michel Thierry 2015-07-30 1102
:::::: The code at line 1087 was first introduced by commit :::::: 894ccebee2b0e606ba9638d20dd87b33568482d7 drm/i915: Micro-optimise gen8_ppgtt_insert_entries()
:::::: TO: Chris Wilson chris@chris-wilson.co.uk :::::: CC: Chris Wilson chris@chris-wilson.co.uk
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