[PATCH 2/2] drm: msm: adreno: improve code indentation & alignment

Align instructions split across multiple lines as per the coding standards. Issue flagged by checkpatch script.

Signed-off-by: Deepak R Varma mh12gx2825@gmail.com --- Please note: This is a project task specific patch.

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c index ffe1fb9be155..ac9296f314be 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c @@ -20,7 +20,7 @@ static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) for (i = 0; i < 36; i++) { gpu_write(gpu, REG_A5XX_CP_PFP_STAT_ADDR, i); drm_printf(p, " %02x: %08x\n", i, - gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA)); + gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA)); } }

@@ -33,7 +33,7 @@ static void me_print(struct msm_gpu *gpu, struct drm_printer *p) for (i = 0; i < 29; i++) { gpu_write(gpu, REG_A5XX_CP_ME_STAT_ADDR, i); drm_printf(p, " %02x: %08x\n", i, - gpu_read(gpu, REG_A5XX_CP_ME_STAT_DATA)); + gpu_read(gpu, REG_A5XX_CP_ME_STAT_DATA)); } }

@@ -46,7 +46,7 @@ static void meq_print(struct msm_gpu *gpu, struct drm_printer *p)

for (i = 0; i < 64; i++) { drm_printf(p, " %02x: %08x\n", i, - gpu_read(gpu, REG_A5XX_CP_MEQ_DBG_DATA)); + gpu_read(gpu, REG_A5XX_CP_MEQ_DBG_DATA)); } }

@@ -63,7 +63,7 @@ static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) for (j = 0; j < 4; j++) val[j] = gpu_read(gpu, REG_A5XX_CP_ROQ_DBG_DATA); drm_printf(p, " %02x: %08x %08x %08x %08x\n", i, - val[0], val[1], val[2], val[3]); + val[0], val[1], val[2], val[3]); } }

@@ -155,5 +155,5 @@ void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) minor->debugfs_root, minor);

debugfs_create_file_unsafe("reset", S_IWUGO, minor->debugfs_root, dev, - &reset_fops); + &reset_fops); }