(In reply to comment #40)
> > 1. The 25175 clock at 44.1 kHz is out of spec. There are no correct values to
> > make it in spec. So either change the clock, rely on hw calculated values, or
> > hope that sinks tolerate the large N.
> 
> 4th alternative is to round CTS and leave the glitches in on those modes. I
> might even slightly prefer that than produce out-of-spec N, but that is just
> my preference and I don't really have any real-world data of course...

If we truncate the clock to 25274 instead instead of rounding it up, we can get
sensible N/CTS. Is that something that's possible to do? I don't know how the
code that generates the clock looks like.