[PATCH v2 04/30] drm: omapdrm: dss: Pass PLL pointer to dss_ctrl_pll_enable()

This will allow accessing the PLL data to get the DSS device pointer, removing the need to access the global DSS private data.

Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com Reviewed-by: Sebastian Reichel sebastian.reichel@collabora.co.uk --- drivers/gpu/drm/omapdrm/dss/dss.c | 13 +++++++------ drivers/gpu/drm/omapdrm/dss/dss.h | 2 +- drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 4 ++-- drivers/gpu/drm/omapdrm/dss/video-pll.c | 6 +++--- 4 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index 6c28e13d9ae0..29c3a0dba698 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -152,17 +152,17 @@ static void dss_restore_context(void) #undef SR #undef RR

-void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable) +void dss_ctrl_pll_enable(struct dss_pll *pll, bool enable) { unsigned int shift; unsigned int val;

- if (!dss.syscon_pll_ctrl) + if (!pll->dss->syscon_pll_ctrl) return;

val = !enable;

- switch (pll_id) { + switch (pll->id) { case DSS_PLL_VIDEO1: shift = 0; break; @@ -173,12 +173,13 @@ void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable) shift = 2; break; default: - DSSERR("illegal DSS PLL ID %d\n", pll_id); + DSSERR("illegal DSS PLL ID %d\n", pll->id); return; }

- regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset, - 1 << shift, val << shift); + regmap_update_bits(pll->dss->syscon_pll_ctrl, + pll->dss->syscon_pll_ctrl_offset, + 1 << shift, val << shift); }

static int dss_ctrl_pll_set_control_mux(enum dss_clk_source clk_src, diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index a7aeb0e7e1ae..ea3eb6b0e7f1 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -310,7 +310,7 @@ struct dss_pll *dss_video_pll_init(struct dss_device *dss, struct regulator *regulator); void dss_video_pll_uninit(struct dss_pll *pll);

-void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable); +void dss_ctrl_pll_enable(struct dss_pll *pll, bool enable);

void dss_sdi_init(int datapairs); int dss_sdi_enable(void); diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c index 8ee9743e6fcf..4fb97cd0cc8d 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c @@ -48,7 +48,7 @@ static int hdmi_pll_enable(struct dss_pll *dsspll) r = pm_runtime_get_sync(&pll->pdev->dev); WARN_ON(r < 0);

- dss_ctrl_pll_enable(DSS_PLL_HDMI, true); + dss_ctrl_pll_enable(dsspll, true);

r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); if (r) @@ -65,7 +65,7 @@ static void hdmi_pll_disable(struct dss_pll *dsspll)

hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);

- dss_ctrl_pll_enable(DSS_PLL_HDMI, false); + dss_ctrl_pll_enable(dsspll, false);

r = pm_runtime_put_sync(&pll->pdev->dev); WARN_ON(r < 0 && r != -ENOSYS); diff --git a/drivers/gpu/drm/omapdrm/dss/video-pll.c b/drivers/gpu/drm/omapdrm/dss/video-pll.c index 12997668730c..344e7e0bbc4e 100644 --- a/drivers/gpu/drm/omapdrm/dss/video-pll.c +++ b/drivers/gpu/drm/omapdrm/dss/video-pll.c @@ -68,7 +68,7 @@ static int dss_video_pll_enable(struct dss_pll *pll) if (r) return r;

- dss_ctrl_pll_enable(pll->id, true); + dss_ctrl_pll_enable(pll, true);

dss_dpll_enable_scp_clk(vpll);

@@ -82,7 +82,7 @@ static int dss_video_pll_enable(struct dss_pll *pll)

err_reset: dss_dpll_disable_scp_clk(vpll); - dss_ctrl_pll_enable(pll->id, false); + dss_ctrl_pll_enable(pll, false); dss_runtime_put(pll->dss);

return r; @@ -96,7 +96,7 @@ static void dss_video_pll_disable(struct dss_pll *pll)

dss_dpll_disable_scp_clk(vpll);

- dss_ctrl_pll_enable(pll->id, false); + dss_ctrl_pll_enable(pll, false);

dss_runtime_put(pll->dss); }