From: John Harrison John.C.Harrison@Intel.com
Minimum set of patches to enable GuC submission on DG1 and enable it by default.
A little difficult to test as IGTs do not work with DG1 due to a bunch of uAPI features being disabled (e.g. relocations, caching memory options, etc...). Hence extra patches at the end to enable some features / add debugging info.
Signed-off-by: Matthew Brost matthew.brost@intel.com Signed-off-by: John Harrison John.C.Harrison@Intel.com
Daniele Ceraolo Spurio (1): drm/i915/guc: put all guc objects in lmem when available
Matthew Brost (5): drm/i915/guc: Add DG1 GuC / HuC firmware defs drm/i915/guc: Enable GuC submission by default on DG1 Me: Allow relocs on DG1 for CI Me: Workaround LMEM blow up Me: Dump GuC log to dmesg on SLPC load failure
Venkata Sandeep Dhanalakota (1): drm/i915: Do not define vma on stack
Vinay Belgaumkar (1): drm/i915: Get PM ref before accessing HW register
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 26 +++++ drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 4 + drivers/gpu/drm/i915/gt/intel_rps.c | 8 +- drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 +- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 13 ++- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 3 + drivers/gpu/drm/i915/gt/uc/intel_huc.c | 14 ++- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 90 ++++++++++++++--- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 + drivers/gpu/drm/i915/i915_gpu_error.c | 99 ++++++++++++++++++- drivers/gpu/drm/i915/i915_gpu_error.h | 3 + 13 files changed, 251 insertions(+), 24 deletions(-)